Matt DeVillier 67cd138df9 soc/intel/apollolake: Add missing header in measured_boot.h ... tss_structures.h is needed for SHA256_DIGEST_SIZE. Change-Id: I0f19b09b770d1e7de6483beb55e901e5f7d3a456 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/88473 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>		2025-07-18 21:30:19 +00:00
..
alderlake	soc/intel/alderlake: Enable USB3 HSIO related parameters for USB3 GEN2 support	2025-07-03 16:57:21 +00:00
apollolake	soc/intel/apollolake: Add missing header in measured_boot.h	2025-07-18 21:30:19 +00:00
baytrail	soc/intel/baytrail: Add microcode for '06-37-08' SOCs	2025-02-03 18:59:45 +00:00
braswell	tree: Handle NULL pointer returned by smm_get_save_state()	2025-01-20 03:26:26 +00:00
broadwell	soc/intel/broadwell: Add CFR objects for existing options	2025-04-25 14:24:27 +00:00
cannonlake	soc/intel: Move CNVI sideband definitions to SoC-specific files	2025-06-16 10:37:49 +00:00
common	soc/intel/cmn/block/fast_spi: Add DMA support	2025-07-15 16:14:59 +00:00
denverton_ns	tree: remove duplicated includes	2025-04-20 05:13:57 +00:00
elkhartlake	soc/intel/elkhartlake: Hook up S0ix setting to option API	2025-05-08 12:27:06 +00:00
jasperlake	soc/intel: Move CNVI sideband definitions to SoC-specific files	2025-06-16 10:37:49 +00:00
meteorlake	soc/intel: Add Arrow Lake-S/HX IDs	2025-07-03 16:57:15 +00:00
pantherlake	vc/intel/fsp/fsp2_0/wcl: Add FSP headers for WCL FSP	2025-07-18 01:15:12 +00:00
skylake	soc/intel/skylake: Expand USB OC pins enum to OC7	2025-06-24 04:25:53 +00:00
snowridge	soc/intel/common/block: Add const qualifier for input of pirq ops	2024-12-09 13:55:53 +00:00
tigerlake	tree: Use boolean for PcieRpSlotImplemented[]	2025-07-02 02:14:22 +00:00
xeon_sp	soc/intel/xeon_sp/gnr: Implement get_mmio_high_base_size	2025-07-18 03:38:34 +00:00
Makefile.mk