coreboot/src
Duncan Laurie 65ac1a07ab broadwell: Rename HASWELL_BCLK to CPU_BCLK
Make the name more generic since it applies to both haswell
and broadwell chips.

BUG=chrome-os-partner:28234
TEST=None

Change-Id: I46aa67e144deb79bd5348a4104da7dc0d0889329
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/198918
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2014-05-09 21:50:36 +00:00
..
arch coreboot: Introduce stage-specific architecture for coreboot 2014-05-09 04:41:47 +00:00
console ipq8064: make UART driver work in bootblock 2014-04-25 01:51:13 +00:00
cpu coreboot: Introduce stage-specific architecture for coreboot 2014-05-09 04:41:47 +00:00
device coreboot: Introduce stage-specific architecture for coreboot 2014-05-09 04:41:47 +00:00
drivers coreboot ARM: Get rid of HAVE_INIT_TIMER config option 2014-05-07 23:30:33 +00:00
ec chromeos: Unconditionally clear the EC recovery request 2014-05-07 03:33:49 +00:00
include coreboot: Introduce stage-specific architecture for coreboot 2014-05-09 04:41:47 +00:00
lib coreboot: Introduce stage-specific architecture for coreboot 2014-05-09 04:41:47 +00:00
mainboard coreboot: Introduce stage-specific architecture for coreboot 2014-05-09 04:41:47 +00:00
northbridge coreboot: Rename coreboot_ram stage to ramstage 2014-05-07 23:30:23 +00:00
soc broadwell: Rename HASWELL_BCLK to CPU_BCLK 2014-05-09 21:50:36 +00:00
southbridge coreboot: Rename coreboot_ram stage to ramstage 2014-05-07 23:30:23 +00:00
superio pnp: Allow setting of misc register 0xf4 in device tree 2013-12-20 00:37:38 +00:00
vendorcode coreboot: Introduce stage-specific architecture for coreboot 2014-05-09 04:41:47 +00:00
Kconfig coreboot: Introduce stage-specific architecture for coreboot 2014-05-09 04:41:47 +00:00