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coreboot ARM: Get rid of HAVE_INIT_TIMER config option

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There is redundancy in terms of use of init_timer. We have a Kconfig option to
decide whether a board has init_timer as well as we use stub for init_timer in
places where we do not have any init_timer defined. Thus, removing the Kconfig
option. Henceforth, all boards that do not have init_timer functionality can
include include a stub_timer if required.

BUG=None
BRANCH=None
TEST=Compiled successfully for all mainboard/google/ boards as well as all the
other boards that were compiling fine before this change using abuild still
compile fine. No additional errors introduced because of this change

Change-Id: Iaffec9ce92107e55d65cc7c9f317feeeba700242
Reviewed-on: https://chromium-review.googlesource.com/195250
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
This commit is contained in:
Furquan Shaikh 2014-04-16 13:24:50 -07:00 • committed by chrome-internal-fetch
commit 9518c5d508
9 changed files with 4 additions and 32 deletions
Download patch file Download diff file Expand all files Collapse all files

5
src/Kconfig
View file

@ -348,11 +348,6 @@ config HAVE_HARD_RESET
This variable specifies whether a given board has a hard_reset
function, no matter if it's provided by board code or chipset code.
config HAVE_INIT_TIMER
bool
default n if UDELAY_IO
default y
config HAVE_MONOTONIC_TIMER
def_bool n
help

4
src/cpu/amd/agesa/family10/Kconfig
View file

@ -45,10 +45,6 @@ config XIP_ROM_SIZE
hex
default 0x80000
config HAVE_INIT_TIMER
bool
default y
config REDIRECT_IDS_HDT_CONSOLE_TO_SERIAL
bool "Redirect AGESA IDS_HDT_CONSOLE to serial console"
default n

4
src/cpu/amd/agesa/family12/Kconfig
View file

@ -63,8 +63,4 @@ config XIP_ROM_SIZE
default 0x80000
depends on CPU_AMD_AGESA_FAMILY12
config HAVE_INIT_TIMER
bool
default y
depends on CPU_AMD_AGESA_FAMILY12

5
src/cpu/amd/agesa/family14/Kconfig
View file

@ -63,11 +63,6 @@ config XIP_ROM_SIZE
default 0x80000
depends on CPU_AMD_AGESA_FAMILY14
config HAVE_INIT_TIMER
bool
default y
depends on CPU_AMD_AGESA_FAMILY14
config HIGH_SCRATCH_MEMORY_SIZE
hex
# Assume the maximum size of stack as (0xA0000 - 0x30000 + 0x1000)

4
src/cpu/amd/agesa/family15/Kconfig
View file

@ -67,10 +67,6 @@ config XIP_ROM_SIZE
hex
default 0x80000
config HAVE_INIT_TIMER
bool
default y
config REDIRECT_IDS_HDT_CONSOLE_TO_SERIAL
bool "Redirect AGESA IDS_HDT_CONSOLE to serial console"
default n

5
src/cpu/amd/agesa/family15tn/Kconfig
View file

@ -68,11 +68,6 @@ config XIP_ROM_SIZE
default 0x100000
depends on CPU_AMD_AGESA_FAMILY15_TN
config HAVE_INIT_TIMER
bool
default y
depends on CPU_AMD_AGESA_FAMILY15_TN
config HIGH_SCRATCH_MEMORY_SIZE
hex
# Assume the maximum size of stack as (0xA0000 - 0x30000 + 0x1000)

4
src/drivers/pc80/udelay_io.c
View file

@ -1,6 +1,10 @@
#include <arch/io.h>
#include <delay.h>
void init_timer(void)
{
}
void udelay(unsigned usecs)
{
int i;

4
src/include/delay.h
View file

@ -1,11 +1,7 @@
#ifndef DELAY_H
#define DELAY_H
#if CONFIG_HAVE_INIT_TIMER
void init_timer(void);
#else
#define init_timer() do{} while(0)
#endif
void udelay(unsigned usecs);
void mdelay(unsigned msecs);

1
src/mainboard/google/peach_pit/Kconfig
View file

@ -30,7 +30,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select CHROMEOS
select MAINBOARD_HAS_NATIVE_VGA_INIT
select MAINBOARD_DO_NATIVE_VGA_INIT
select HAVE_INIT_TIMER
select DRIVER_PARADE_PS8625
config MAINBOARD_DIR