This commit introduces a driver for a second P2SB (Primary to SideBand)
device to support certain Intel SoC configurations. The new driver
offers new functions, such as p2sb2_enable_bar(), p2sb2_sbi_read(), and
p2sb2_sbi_write(), for accessing and managing the second P2SB
interface (P2SB2). This interface is essential for managing sideband
communications in some Intel SoCs, such as Panther Lake.
BUG=b:422284273
TEST=Successful communication with the P2SB2 device during Fatcat board
boot.
Change-Id: I33941c85243e2529d1dd931b2afd7ab4814d9549
Signed-off-by: Sowmya Aralguppe <sowmya.aralguppe@intel.com>
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87929
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
61ac238bb5