erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions
coreboot/src/soc
History
Duncan Laurie 5d166a0c4d broadwell: Changes from 2.2.0 ref code 
- The SATA CAP register setup was moved outside the refcode blob we run
so it needs to be set up by coreboot again...
- Slight tweak to fast ramp voltage for broadwell CPU

BUG=chrome-os-partner:25491
BRANCH=None
TEST=Build and boot on samus

Change-Id: I7bdc0811ad8f28ab0912972036dca59d229b0173
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/214024
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2014-08-25 20:53:09 +00:00
..
intel broadwell: Changes from 2.2.0 ref code 2014-08-25 20:53:09 +00:00
nvidia tegra132: refactor cpu startup code 2014-08-23 04:51:26 +00:00
qualcomm ipq806x: implement GPIO API 2014-07-30 23:40:58 +00:00
rockchip coreboot: rk3288: add clock module 2014-08-13 02:50:48 +00:00
samsung coreboot classes: Add dynamic classes to coreboot 2014-07-28 19:19:34 +00:00
Kconfig coreboot: rk3288: Add a stub implementation of the rk3288 SOC 2014-07-23 06:46:35 +00:00
Makefile.inc coreboot: rk3288: Add a stub implementation of the rk3288 SOC 2014-07-23 06:46:35 +00:00