Patrick Rudolph 4e61dd36e4 soc/amd/cezanne: Move SSDT code into DSDT ... Now that the ACP device is always present in DSDT move the MSG0 method and helper functions into DSDT. This allows to clean the common ACP code and reduces differences in the runtime code pathes. The newly introduced DSDT is also verified at compile time. Change-Id: Ifc55278aa66abcb54691017738cc843e3088d8e8 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/91159 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2026-02-17 14:22:52 +00:00
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cezanne	soc/amd/cezanne: Move SSDT code into DSDT	2026-02-17 14:22:52 +00:00
common	soc/amd/cezanne: Move SSDT code into DSDT	2026-02-17 14:22:52 +00:00
genoa_poc	soc/amd: add ACPI code for I3C controller	2025-12-01 19:41:52 +00:00
glinda	soc/amd/common/block/acp/acp: Drop acpi_device_write_pci_dev	2026-02-17 14:22:33 +00:00
mendocino	soc/amd/common/block/acp/acp: Drop acpi_device_write_pci_dev	2026-02-17 14:22:33 +00:00
phoenix	soc/amd/common/block/acp/acp: Drop acpi_device_write_pci_dev	2026-02-17 14:22:33 +00:00
picasso	soc/amd/common/block/acp/acp: Drop acpi_device_write_pci_dev	2026-02-17 14:22:33 +00:00
stoneyridge	soc/amd/stoneyridge: Generate SATA ACPI registers at runtime	2025-11-14 16:28:19 +00:00
turin_poc	vendorcode/amd/opensil: Add Turin OpenSIL	2026-01-28 13:32:33 +00:00