Bincai Liu f864a192e3 soc/mediatek/mt8196: Support 512 bytes EDID ... Refine dptx_get_edid function to read extension edid to bring up 2.8k 120hz OLED panel. BRANCH=rauru BUG=b:392040003 TEST=check edp training pass and show log: EQ training pass Change-Id: If35782950ae02d892ea697580fa4991595c21533 Signed-off-by: Bincai Liu <bincai.liu@mediatek.corp-partner.google.com> Signed-off-by: Yidi Lin <yidilin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86779 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2025-03-12 12:45:48 +00:00
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common	soc/mediatek/mt8196: Support 512 bytes EDID	2025-03-12 12:45:48 +00:00
mt8173	soc/mediatek/common: Rename GPT_MHZ to TIMER_MHZ for readability	2024-12-21 16:09:23 +00:00
mt8183	tree: Remove unused <assert.h>	2024-11-19 00:40:04 +00:00
mt8186	soc/mediatek: Allow specifying multiple EINT base registers	2025-01-18 13:09:40 +00:00
mt8188	soc/mediatek: Allow specifying multiple EINT base registers	2025-01-18 13:09:40 +00:00
mt8189	soc/mediatek/mt8189: Reduce bootblock size by separating SPI NOR GPIOs	2025-02-22 00:57:59 +00:00
mt8192	soc/mediatek: Allow specifying multiple EINT base registers	2025-01-18 13:09:40 +00:00
mt8195	soc/mediatek: Allow specifying multiple EINT base registers	2025-01-18 13:09:40 +00:00
mt8196	soc/mediatek/mt8196: Eliminate mt6685_hw.h and mt6685_rtc_hw.h	2025-03-10 04:04:59 +00:00