Aaron Durbin 5aa825ffd2 t132: bump bootblock size up ... With the fix to the serial port address the bootblock size increased which subsequently bumped the bct size because it works in blocks. Another bump will be needed in the future once more code is added. For the time being this should work. BUG=chrome-os-partner:29882 BRANCH=None TEST=Built and see serial output from bootblock. Change-Id: I8a16e8faeb7223456286d2b14fd1cd2f78b00b71 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/205436 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org>		2014-06-25 01:30:04 +00:00
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arch	smbios: Allow custom Type3 entry	2014-06-13 22:43:24 +00:00
console	Add stage information to coreboot banner	2014-05-14 20:49:21 +00:00
cpu	x86: Initialize drivers in SMM context if needed	2014-06-20 18:27:33 +00:00
device	i2c: Add software_i2c driver for I2C debugging and emulation	2014-05-19 20:34:31 +00:00
drivers	Support storm Spansion flash variety	2014-06-23 21:48:49 +00:00
ec	chrome ec: Add ACPI Device for ALS if enabled	2014-06-19 13:39:36 +00:00
include	Add and consistently use wrapper macro for romstage static variables	2014-06-09 22:21:10 +00:00
lib	Add and consistently use wrapper macro for romstage static variables	2014-06-09 22:21:10 +00:00
mainboard	rush: update Version field to match t132	2014-06-25 01:29:59 +00:00
northbridge	coreboot: Rename coreboot_ram stage to ramstage	2014-05-07 23:30:23 +00:00
soc	t132: bump bootblock size up	2014-06-25 01:30:04 +00:00
southbridge	coreboot: Rename coreboot_ram stage to ramstage	2014-05-07 23:30:23 +00:00
superio	pnp: Allow setting of misc register 0xf4 in device tree	2013-12-20 00:37:38 +00:00
vendorcode	Add and consistently use wrapper macro for romstage static variables	2014-06-09 22:21:10 +00:00
Kconfig	coreboot arm64: Add support for arm64 into coreboot framework	2014-05-15 23:52:58 +00:00