erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

t132: bump bootblock size up

Browse source 
With the fix to the serial port address the bootblock size increased
which subsequently bumped the bct size because it works in blocks.
Another bump will be needed in the future once more code is added.
For the time being this should work.

BUG=chrome-os-partner:29882
BRANCH=None
TEST=Built and see serial output from bootblock.

Change-Id: I8a16e8faeb7223456286d2b14fd1cd2f78b00b71
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/205436
Reviewed-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
This commit is contained in:
Aaron Durbin 2014-06-24 14:40:52 -05:00 • committed by chrome-internal-fetch
commit 5aa825ffd2
1 changed files with 2 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

4
src/soc/nvidia/tegra132/Kconfig
View file

@ -26,11 +26,11 @@ config BOOTBLOCK_ROM_OFFSET
config CBFS_HEADER_ROM_OFFSET
hex "offset of master CBFS header in ROM"
default 0x19000
default 0x22000
config CBFS_ROM_OFFSET
hex "offset of CBFS data in ROM"
default 0x19080
default 0x22080
config BOOTBLOCK_BASE
hex