coreboot/src/northbridge/intel
Elyes HAOUAS 97f5780308 UPSTREAM: nb/i945: Clean "Programming DLL Timings" function
As we drive both channels with the same speed,
chan0dll and chan1dll are the same.

BUG=none
BRANCH=none
TEST=none

Change-Id: I64c2fe3d14c3f174448863ac37ac8ba21f09a369
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 44a3066015
Original-Change-Id: I7253ea9ea66396c536c82d63c67fecb041681707
Original-Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Original-Reviewed-on: https://review.coreboot.org/18472
Original-Reviewed-by: Nico Huber <nico.h@gmx.de>
Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Original-Tested-by: build bot (Jenkins)
Reviewed-on: https://chromium-review.googlesource.com/450238
2017-03-06 07:04:36 -08:00
..
common UPSTREAM: spi: Clean up SPI flash driver interface 2016-11-29 17:38:45 -08:00
e7505 UPSTREAM: MMCONF_SUPPORT: Flip default to enabled 2016-12-08 12:31:41 -08:00
fsp_rangeley UPSTREAM: intel/fsp_rangeley: Fix use of __SIMPLE_DEVICE__ 2016-12-19 09:55:26 -08:00
fsp_sandybridge UPSTREAM: nb/intel/*/northbridge.c: Remove #include <device/hypertransport.h> 2017-01-09 23:46:51 -08:00
gm45 UPSTREAM: drivers/intel/gma/vbt: Add Kconfig symbol for SSC ref 2017-02-06 10:37:41 -08:00
haswell UPSTREAM: Only show CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM option when implemented 2017-02-06 10:37:41 -08:00
i440bx UPSTREAM: MMCONF_SUPPORT: Flip default to enabled 2016-12-08 12:31:41 -08:00
i855 UPSTREAM: MMCONF_SUPPORT: Flip default to enabled 2016-12-08 12:31:41 -08:00
i945 UPSTREAM: nb/i945: Clean "Programming DLL Timings" function 2017-03-06 07:04:36 -08:00
i3100 UPSTREAM: nb/intel/*/northbridge.c: Remove #include <device/hypertransport.h> 2017-01-09 23:46:51 -08:00
i5000 UPSTREAM: MMCONF_SUPPORT: Flip default to enabled 2016-12-08 12:31:41 -08:00
i82810 UPSTREAM: MMCONF_SUPPORT: Flip default to enabled 2016-12-08 12:31:41 -08:00
i82830 UPSTREAM: MMCONF_SUPPORT: Flip default to enabled 2016-12-08 12:31:41 -08:00
nehalem UPSTREAM: nehalem/Kconfig: Rename TRAINING_CACHE_SIZE to MRC_CACHE_SIZE 2017-02-27 12:03:17 -08:00
pineview UPSTREAM: nb/intel/pineview: Make preallocated igd memory a cmos parameter 2017-01-27 07:48:59 -08:00
sandybridge UPSTREAM: nb/intel/*/northbridge.c: Remove #include <device/hypertransport.h> 2017-01-09 23:46:51 -08:00
x4x UPSTREAM: nb/intel/x4x: Implement resume from S3 suspend 2017-02-21 06:44:24 -08:00