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UPSTREAM: drivers/intel/gma/vbt: Add Kconfig symbol for SSC ref

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The selection of the SSC reference frequency for LVDS was based on a
completely unrelated clock.

The `ssc_freq` flag should be set when the SSC reference runs at a
different frequency than the general display reference clock (DREF).
For most platforms, there is no choice, i.e. for i945 and gm45 the SSC
reference always differs from the display reference clock (i945: 66Mhz
SSC vs. 48MHz DREF; gm45: 100MHz SSC vs. 96Mhz DREF), for Nehalem and
newer, it's the same frequency for SSC/non-SSC (120MHz).  The only,
currently supported platform with a choice seems to be Pineview, where
the alternative is 100MHz vs. the default 96MHz.

BUG=none
BRANCH=none
TEST=none

Change-Id: I869be7519523453cd776fdc8c4cdc4dc0db03ad2
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 561bebfbaa
Original-Change-Id: I7791754bd366c9fe6832c32eccef4657ba5f309b
Original-Signed-off-by: Nico Huber <nico.huber@secunet.com>
Original-Reviewed-on: https://review.coreboot.org/18186
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/438055
This commit is contained in:
Nico Huber 2017-01-19 16:28:18 +01:00 • committed by chrome-bot
commit d342ea573d
4 changed files with 20 additions and 1 deletions
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16
src/drivers/intel/gma/Kconfig
View file

@ -2,6 +2,7 @@
## This file is part of the coreboot project.
##
## Copyright 2013 Google Inc.
## Copyright 2016-2017 secunet Security Networks AG
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
@ -37,6 +38,21 @@ config INTEL_GMA_ACPI
bool
default n
config INTEL_GMA_SSC_ALTERNATE_REF
bool
default n
help
Set when the SSC reference clock for LVDS runs at a different fre-
quency than the general display reference clock.
To be set by northbridge or mainboard Kconfig. For most platforms,
there is no choice, i.e. for i945 and gm45 the SSC reference always
differs from the display reference clock (i945: 66Mhz SSC vs. 48MHz
DREF; gm45: 100MHz SSC vs. 96Mhz DREF), for Nehalem and newer, it's
the same frequency for SSC/non-SSC (120MHz). The only, currently
supported platform with a choice seems to be Pineview, where the
alternative is 100MHz vs. the default 96MHz.
config GFX_GMA_CPU
string
default "Skylake" if SOC_INTEL_SKYLAKE

3
src/drivers/intel/gma/vbt.c
View file

@ -2,6 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2013, 2014 Vladimir Serbinenko
* Copyright (C) 2017 secunet Security Networks AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -59,7 +60,7 @@ static size_t generate_vbt(const struct i915_gpu_controller_info *const conf,
genfeat->flexaim = 1;
genfeat->download_ext_vbt = 1;
genfeat->enable_ssc = conf->use_spread_spectrum_clock;
genfeat->ssc_freq = !conf->link_frequency_270_mhz;
genfeat->ssc_freq = IS_ENABLED(CONFIG_INTEL_GMA_SSC_ALTERNATE_REF);
genfeat->rsvd10 = 0x4;
genfeat->legacy_monitor_detect = 1;
genfeat->int_crt_support = 1;

1
src/northbridge/intel/gm45/Kconfig
View file

@ -24,6 +24,7 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select VGA
select INTEL_EDID
select INTEL_GMA_ACPI
select INTEL_GMA_SSC_ALTERNATE_REF
select RELOCATABLE_RAMSTAGE
config CBFS_SIZE

1
src/northbridge/intel/i945/Kconfig
View file

@ -24,6 +24,7 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select LAPIC_MONOTONIC_TIMER
select VGA
select INTEL_GMA_ACPI
select INTEL_GMA_SSC_ALTERNATE_REF
select RELOCATABLE_RAMSTAGE
config NORTHBRIDGE_INTEL_SUBTYPE_I945GC