coreboot/src
Marc Jones 20b5896adb Add support for GigaDevice GD25LQ64C/GD25LB64C SPI ROM.
GD25LQ64C and GD25LB64C have the same ID and settings.

BUG=chrome-os-partner:25907
BRANCH=baytrail
TEST=Boot  with GD25LQ64 and check MRC data save/restore works.

Change-Id: I86d1e69552b6000faa9e0523356e27d7e2a6a6db
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: https://chromium-review.googlesource.com/193238
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2014-08-28 01:16:15 +00:00
..
arch Linux copy of mips/ashldi3.c 2014-08-26 21:02:17 +00:00
console vboot2: implement select_firmware for pre-romstage verification 2014-06-30 18:45:09 +00:00
cpu haswell: Update microcode revision 2014-07-29 04:37:18 +00:00
device i2c: Add software_i2c driver for I2C debugging and emulation 2014-05-19 20:34:31 +00:00
drivers Add support for GigaDevice GD25LQ64C/GD25LB64C SPI ROM. 2014-08-28 01:16:15 +00:00
ec chromeec: provide proto v3 over i2c support 2014-08-07 22:38:07 +00:00
include smbios: add funtion for smbios type17 2014-08-12 02:40:38 +00:00
lib rmodule: Fix rmodule.ld for 64-bit 2014-08-28 01:14:24 +00:00
mainboard auron: Convert mainboard to use soc/intel/broadwell 2014-08-27 04:02:18 +00:00
northbridge coreboot: Rename coreboot_ram stage to ramstage 2014-05-07 23:30:23 +00:00
soc t132: Increase TrustZone Carveout Region size 2014-08-28 01:14:39 +00:00
southbridge coreboot: Rename coreboot_ram stage to ramstage 2014-05-07 23:30:23 +00:00
superio pnp: Allow setting of misc register 0xf4 in device tree 2013-12-20 00:37:38 +00:00
vendorcode vboot: Introduce kconfig variable for VBNV backing storage 2014-08-25 04:52:51 +00:00
Kconfig Enable publishing of board ID where supported 2014-07-30 23:41:23 +00:00