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coreboot/src
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Aaron Durbin 18d318331b tegra132: output chip information and MTS version 
It's helpful to be able to track this information. Therefore
dump it in to the console log.

BRANCH=None
BUG=chrome-os-partner:31126
TEST=Built and ran on rush. Revision information is put out on the
     console.

Change-Id: Ic95382126a6b8929d0998d1c9adfcbd10e90663f
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/210903
Reviewed-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
2014-08-04 23:38:20 +00:00
..
arch arm: add _end symbol to bootblock.ld 2014-08-04 16:34:12 +00:00
console vboot2: implement select_firmware for pre-romstage verification 2014-06-30 18:45:09 +00:00
cpu haswell: Update microcode revision 2014-07-29 04:37:18 +00:00
device i2c: Add software_i2c driver for I2C debugging and emulation 2014-05-19 20:34:31 +00:00
drivers vboot2: read secdata and nvdata 2014-07-23 02:29:18 +00:00
ec vboot2: read dev and recovery switch 2014-07-02 00:45:22 +00:00
include Publish the board ID value in coreboot table, when configured 2014-07-30 23:41:05 +00:00
lib Include board ID calculations only when necessary 2014-07-30 23:41:10 +00:00
mainboard ryu: Add three more full LPDDR3 SDRAM BCTs 2014-08-04 23:38:15 +00:00
northbridge coreboot: Rename coreboot_ram stage to ramstage 2014-05-07 23:30:23 +00:00
soc tegra132: output chip information and MTS version 2014-08-04 23:38:20 +00:00
southbridge coreboot: Rename coreboot_ram stage to ramstage 2014-05-07 23:30:23 +00:00
superio pnp: Allow setting of misc register 0xf4 in device tree 2013-12-20 00:37:38 +00:00
vendorcode vboot: Update VBOOT_CFLAGS to include rmodules ccopts 2014-07-30 03:09:55 +00:00
Kconfig Enable publishing of board ID where supported 2014-07-30 23:41:23 +00:00