Matt DeVillier 038829feb3 soc/intel: Use chipset.cb for SMBUS device ops linking ... Move SMBUS device operations linking from PCI Device ID matching to chipset.cb files for all Intel SoCs that have them, matching the approach used by Skylake. Remove corresponding DIDs from smbus.c for these SoCs; keep DID matching only for SoCs without chipset.cb files. This standardizes the approach across Intel SoCs and makes the SMBUS controller configuration explicit in devicetree, and prevents the endless proliferation of DIDs in the common driver code. Change-Id: I1c742836d923eb8f521bdbd7fa8260c82c1156ac Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/90918 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jakub "Kuba" Czapiga <czapiga@google.com>		2026-01-28 13:38:33 +00:00
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amd	vendorcode/amd/opensil: Add Turin OpenSIL	2026-01-28 13:32:33 +00:00
cavium
example/min86
ibm/power9	soc/power9/rom_media.c: find CBFS in PNOR	2025-08-28 20:14:01 +00:00
intel	soc/intel: Use chipset.cb for SMBUS device ops linking	2026-01-28 13:38:33 +00:00
mediatek	soc/mediatek/common: Combine dsi_cmdq_size register writes	2026-01-25 19:06:22 +00:00
nvidia	treewide: Move mipi_panel_parse_commands() to commonlib	2026-01-14 09:38:36 +00:00
qualcomm	soc/qualcomm/x1p42100: Relocate CBMEM top to PIL region base	2026-01-28 05:51:14 +00:00
rockchip	treewide: Move mipi_panel_parse_commands() to commonlib	2026-01-14 09:38:36 +00:00
samsung
sifive
ti
ucb/riscv
xilinx