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soc/qualcomm/x1p42100: Relocate CBMEM top to PIL region base

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The current CBMEM top is situated at the base of 'dram_xbl_log'
(0x81A00000), leaving only 4.4MB of usable memory below it. This
space has become insufficient for the growing size requirements of
the coreboot configuration tables and boot services.

Relocate the CBMEM top to the base of the PIL region (0x866C0000).
This move increases the available contiguous memory for CBMEM
allocation from 4.4MB to 7.3MB, ensuring sufficient headroom for
the tables and reducing fragmentation for the OS and runtime services.

Changes:
- Update cbmem_top_chipset() to return _dram_pil as the new boundary.
- Update memlayout.ld documentation to reflect CBMEM's new position
  directly below the PIL region.

TEST=Verified CBMEM initialization on Bluey; confirmed coreboot
tables are correctly allocated at the new high-memory boundary and
no overlaps occur with reserved regions.

Change-Id: I26d95b952634ce06ed2171c75bc6a129c15ec3b8
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90912
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Avi Uday <aviuday@google.com>
This commit is contained in:
Subrata Banik 2026-01-26 13:39:32 +00:00
commit 50099def6f
2 changed files with 3 additions and 3 deletions
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2
src/soc/qualcomm/x1p42100/cbmem.c
View file

@ -6,5 +6,5 @@
uintptr_t cbmem_top_chipset(void)
{
return (uintptr_t)_dram_xbl_log;
return (uintptr_t)_dram_pil;
}

4
src/soc/qualcomm/x1p42100/memlayout.ld
View file

@ -51,6 +51,8 @@
* 0x91380000 +----------------------------------------------------------+ | |
* | dram_pil | | |
* 0x866C0000 +----------------------------------------------------------+ | |
* | CBMEM | | |
* +----------------------------------------------------------+ | |
* | ... Usable memory ... | | |
* 0x85F80000 +----------------------------------------------------------+ | |
* | dram_wlan | | |
@ -81,8 +83,6 @@
* 0x81A40000 +----------------------------------------------------------+ | |
* | dram_xbl_log | | |
* 0x81A00000 +----------------------------------------------------------+ | |
* | CBMEM | | |
* +----------------------------------------------------------+ | |
* | ... Usable memory ... | | |
* 0x815A0000 +----------------------------------------------------------+ | |
* | dram_cpucp | | |