erebion/coreboot
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4 commits

Author SHA1 Message Date
Ronald G. Minnich
8fa4c17322 We now support l2 cache! 
first cut at acer m1631 support.
 2000-11-21 17:30:21 +00:00
Ronald G. Minnich
ab80324461 Tweaks for VIA SPD support. 
Added L2 cache support.
 2000-11-21 01:17:56 +00:00
Ronald G. Minnich
21322ba3b7 mtrr fixes for 630, they are a hack now. 
ipl.S: check for FRAMEBUFFER, don't set 0x63 if HAVE_FRAMEBUFFER not
defined.

Starting support for L440GX
 2000-11-01 03:08:35 +00:00
Ronald G. Minnich
934e5e0403 reorg 2000-10-17 13:18:43 +00:00