The commit f66c7c1037 ("util/abuild: Update echo to printf for
consistency") accidentally added whitespaces to the missing_arches
variable, causing the [[ -n "${missing_arches}" ]] check to fail.
The commit c81b08c4ba ("util/abuild: Fix building ChromeOS boards")
intended to fix it, but did it the wrong way.
Now, really fix the problem from the Makefile snippet that is causing
the whitespace issue.
Change-Id: I5e417e851840bad000492bf737fc8e25063fe0c4
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87809
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
The commit 49ae935b37 ("util/abuild: Change [...] to [[...]] for
consistency") [1] accidentally replaced "\>" with ">" in a grep pattern,
causing all boards to be considered not supporting ChromeOS.
The commit f66c7c1037 ("util/abuild: Update echo to printf for
consistency") [2] replaced
@echo $(foreach arch,$(REQUIRED_ARCHES),\
$(if $(filter $(arch),$(SUBARCH_SUPPORTED)),,$(arch)))
with
@printf "%s\n" "$(foreach arch,$(REQUIRED_ARCHES),\
$(if $(filter $(arch),$(SUBARCH_SUPPORTED)),,$(arch)))"
and caused an additional whitespace character to be printed when all
required archs are supported. The result of the `missing_arches` shell
variable would be " ", and hence the `[[ -n "$missing_arches" ]]` check
would be wrong. Fix this by using `-z`.
[1] CB:87367
[2] CB:87368
Change-Id: Ib77566e70ac8b3717f3b29433ce9ae0a1fc69cce
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87708
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub "Kuba" Czapiga <czapiga@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
In CB:87370 (util/abuild: Use ${} around variable names),
commit id: a2baaec067, some lines were unintentionally reordered.
This led to abuild not working as intended.
Change-Id: I0aced8dde475f7338e4670c11a9cd1ec4502d743
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87681
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Nuvoton NCT6779D has an undocumented GPIOE# functionality similar
to that found in NCT6791D. Its latched status can be read from
LDN B register 0xfb. Add it to the roster of dumped registers to
help development.
Change-Id: Id050b8efde855dec8099f1ac35307f7d372ae499
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87364
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Use an array instead of a variable as suggested by the TODO, so we can
remove the shellcheck disable and fix the warning.
Change-Id: I5e872ebe350f339b932a711fe7f6a68743f002ed
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87379
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Increment the version number for the current changes.
Change-Id: Iec94067e34292df3b85744a820ace4aa198a6322
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87378
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
This fixes the shellcheck warnings about declaring and using local
variables at the same time.
Change-Id: Ia16911c9ea0a1b32c3480a93ca0e53a409e80d22
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87373
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Shellcheck warns that the interrupt() function is unreachable, but it's
set to run on CTL-C. Disable the warning.
Change-Id: I0b850573964c732b1a3875dfdc7c1f0d406bac1a
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87371
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
While not always necessary, for consistency, use the ${} around all
variables.
Change-Id: I53fdddfd41e8aaa062bee73f441c5a816282c8ed
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87370
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Abuild used a mix of 'function funcname' and 'funcname()`. This
standardizes them all to use the 'funcname()' format. While they do
the same thing, we should be consistent across the file, and the
'funcname()' syntax is generally preferred.
Change-Id: I7530aa41b6413f0d5febe3d8a0db4a98113e1448
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87369
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Abuild used a mix of echo and printf. This updates them all to printf,
which is generally safer, especially when printing variable content
that might contain special characters or start with '-'.
Change-Id: Ib7f35fbaaffe8a85e2b9a1d7c0b8e04ffe0e9901
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87368
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
The [[...]] form is generally recommended as it's more robust and
handles edge cases better (e.g., word splitting, pathname expansion).
Change-Id: I74189c25f0e602a4359272033c6725494a0f487f
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87367
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Warn about allocation function calls with insufficient size for the
target type of the pointer.
commit 6ab188ee6c ("Makefile.mk: Use Walloc-size GCC option")
introduced this GCC option, then commit d05fe9fd3c ("Revert
"Makefile.mk:Use Localiser GCC option"") reverted it because older GCC
versions did not support it.
This change re-enables it for GCC version equal or greater than 14.1.0.
Change-Id: If5d36b073bb5b4cccb0cf2b67b43edb3f97f168c
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84074
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
This environment variable can be used to identify when the build is
running from abuild. This can control things like whether or not the
payloads will pull down a new version from git.
This is important on the builders because the network can't be accessed,
but also it'd be unexpected to change the state of the tree when running
abuild locally.
Change-Id: I03a29aeff655ba7067b505b4e26d5b0f4157c67f
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87366
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Add a linter file to check the formatting of our go files.
For now only intelp2m utiliy is checked.
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I9c75fc0bf20a2625ddae43b0472a6586ae78f213
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87211
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
As per commit cf4722d317 ("src/mb: Update unlicensable files with the
CC-PDDC SPDX ID") effectively empty files should use the Creative
Commons Public Domain Dedication and Certification (CC-PDDC) license
header. Add a function to create an empty file and add the CC-PDDC SPDX
header and a comment to change the license if content is added.
The only empty files that autoport currently generates are ec.asl and
superio.asl on non-laptop systems, where NoEC() is used.
Change-Id: I409a6d90d671258e318c26e34a35c238d6fd28c1
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84329
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Now that we require the FMAP to start at offset 0 in the flash, we can
assume this across the entire codebase and therefore simplify it on
several ends.
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: Ieb1a23f9c0ae8c0e1c91287d7eb6f7f0abbf0c2c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86771
Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
commit a7eb390796 ("mb/*/*/*.fmd: Start flash at 0")
caused a build failure for all mainboards that generate their FMAP
from the IFD (so intel only) instead of providing one themselves.
Jenkins didn't catch that, because apparently all mainboards that have
the IFD in the 3rdparty/blobs repository provide a custom FMAP.
So there was no defconfig that jenkins tested that would come across
this issue.
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: Ia9852e8ef48148264d2d3f73eb667f3eb8b85005
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87288
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
According to MediaTek's proprietary PI_IMG parser, two cookies (one
header and one footer) are expected. Therefore, add a script to perform
validity check of the PI_IMG firmware, so that format errors could be
caught in build time.
Change-Id: I27011492c7fab747aa3ee12d514d20a6a52d0a4d
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87226
Reviewed-by: Yidi Lin <yidilin@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
After CB:86803, ${branch} variable is no longer valid. Use
${branch_name} instead ${branch} for generating the commit message.
TEST=./util/scripts/update_submodules -R 3rdparty/arm-trusted-firmware/
The script generates the new commit successfully.
Change-Id: Ia528379b8721e6d419984bab28de7cf427e42423
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87268
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
To allow adding more scripts to the util/mtkheader folder, rename it to
util/mediatek. Also update description.md and regenerate
Documentation/util.md and util/README.md by util_readme.sh.
Change-Id: Ibc6ef9dddc541d2dd471898af431cadde231edca
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87225
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
As CB:71757 [1] updates Documentation/util.md and util/README.md
manually without modifying util/intelp2m/description.md, we port the
description changes back to that file.
[1] commit da54bd60af ("Documentation: Update information about
intelp2m")
Change-Id: I3d3f87517c445d650e9cea61448b28d005d46737
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87224
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
FMAP should not contain information about the memory map.
Done with the following command:
"find -name \*.fmd -exec sed -i 's/\(FLASH\).* \(.*\) /\1 \2 /' {} \;"
for AMD:
All addresses that amdfwtool expects as command line parameter have the
ADDR_REL_BIOS (flash address) address_mode setting. One exception is
the *_FW_A_POSITION and *_FW_B_POSITION addresses. But amdfwtool checks
if memory or flash addresses are passed and converts accordingly. So
changing the address from memory -> flash doesn't matter for the
resulting binary.
Since commit 41a162b7a8 ("soc/amd/phoenix/Makefile.inc: Pass APOB_NV
address as offset") and therefore since phoenix SOC, APOB_NV is passed
as flash offset. But before that the memory ABL always assumed a MMIO
address (no matter the address_mode) so we need to add a little quirk
for that.
tested: boot glinda based mainboard and also check that memory training
is still cached successfully in APOB_NV.
Change-Id: Iac86ef9be6b14817a65bf3a7ccb624d205ca3f99
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63771
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Add the PLATFORM_FAEGAN element to the 'platform' enum and use it in the
code. The Faegan SoC is similar to the Glinda SoC, but has a different
PSP ID.
Change-Id: I40a3e9981696fc02a44fbf300d1b47060a4a398b
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86940
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ana Carolina Cabral <ana.cpmelo95@gmail.com>
Other types of FWs in the BIOS table are defined by context. So the
BIOS binary should follow that.
TEST=Binary identical test on platforms before mendocino
Tested on Skyrim
Change-Id: I9c2f2983d03c913b28fbd87aa0925a32a4649d62
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85466
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
It is more reasonable. And, in later change, the Level 1 should be
split with Level 2 and combined with EFS.
Change locate_bdt2_bios to locate_bdt_bios. This function is more
flexibile and covers both L1 and L2 BIOS directory table.
Change-Id: I74605013cf53a38686f4e1e5a89a4e6a870f1f4b
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84532
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This is now drawn (indirectly) from main usb_port_config.
Also drop it from autoport.
Change-Id: I8c5e9b2016cf56538de06575181a0a6b738c6a28
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85925
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Instead of guessing the default branch by iterating over a list of
branch names, use the branch that is configured as default by upstream.
Change-Id: I628b5a4e5228870c54719577e32dae169b0ceb2e
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86803
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Newer recovery images change the manifest format yet again, so increase
the lookhead when parsing the bios_image field to ensure we can find it.
TEST=run `./crosfirmware.sh craaskbowl` without erroring out
Change-Id: Idb1862e38a82f3cec8db55993ccf421cf3572c6f
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86777
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
The help text of cbfstool's memory map window assignment option
needs to be corrected to [--mmap flash-base:mmio-base:size] from
[--mmio flash-base:mmio-base:size].
P.S. The option --mmap was initially introduced by
commit 34a7e66faa ("util/cbfstool: Add a new mechanism to
provide a memory map").
Change-Id: I5f8224c8789e642fc68f6ae2242e8e7a7228c8de
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86639
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Reduces the size of the Docker image by removing all unnecessary files.
Change-Id: Ib8c658799217c3b6595e3b5fce8f5c8238054c45
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86617
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Instead of a pointer to a function for analyzing the pad name, provide
GPP group slice with pad names to the parser. This will get rid of some
functions and files and make the code cleaner.
TEST:
- 'make test' = PASS;
- 'intelp2m -file parser/testlog/inteltool_test.log' = no errors.
Change-Id: I0d7818d3892450a37bffbf1ffd9524888e4675bf
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85769
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
According to the architecture, this is part of the common block.
TEST: 'make test' = PASS
Change-Id: I6390182ab00d9ebd787e8da6f341e3ef85572991
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71235
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
- embed the base platform and redefine its methods if they differ;
- separate the macro structures from the platform;
- move more functions to common;
- undo use of a single global instance of the microstructure.
TEST:
1) 'make test' = PASS
2) './intelp2m -p cnl -iiii -file inteltool.log' = gpio.h before and
after the commit is the same.
Change-Id: I2e0aa56efa2430ac6524c6977f8b6fd13113edf9
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71167
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
- Split the parser code into several packages to make its testing of its
functions more convenient and detailed. This also makes embedding the
parser in third-party applications more flexible - there is no need to
use all the functionality of the parser.
- Clean up code and remove unnecessary objects to make intelp2m simpler
and more readable.
- Change the common macro format to be consistent with the new parser.
- Rename the results directory containing gpio.h to output to avoid
confusion with the generator package directory.
- At the moment there is no mechanism for setting the Ownership flag.
This will be added in later versions.
Tests:
- make test = PASS
- gpio.h for Apollo Lake before and after the patch is the same
Change-Id: I9a29322dd31faf9ae100165f08f207360cbf9f80
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70543
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
The utility can parse the value of non-DWx registers, if they are
present in the inteltool dump. However, the functions that allow the
inteltool utility to print the value of such registers have not been
added to the master branch, and it makes no sense to support such
functions in intelp2m, besides, their implementation is far from ideal.
Remove this unused functionality. This will be restored in the future in
a different form and after corresponding changes in inteltool.
TEST: make test = PASS
Change-Id: If5c77ff942a620897c085be4135cb879a0d40a00
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56887
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Add logging to a file, ./logs.txt by default. --logs option is used to
override this path. Error messages are duplicated to the console.
Change-Id: I97aba146b6d8866a7fa46bac80c27c0896b26cf7
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70542
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
