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util/intelp2m: Rework platforms and fields packages

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- embed the base platform and redefine its methods if they differ;
- separate the macro structures from the platform;
- move more functions to common;
- undo use of a single global instance of the microstructure.

TEST:
1) 'make test' = PASS
2) './intelp2m -p cnl -iiii -file inteltool.log' = gpio.h before and
   after the commit is the same.

Change-Id: I2e0aa56efa2430ac6524c6977f8b6fd13113edf9
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71167
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Maxim Polyakov 2022-12-20 21:00:45 +03:00 • committed by Felix Singer
commit 85054dbccb
42 changed files with 1106 additions and 1549 deletions
Download patch file Download diff file Expand all files Collapse all files

32
util/intelp2m/fields/cb/cb.go
View file

@ -5,7 +5,7 @@ import (
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
)
type FieldMacros struct{}
type FieldCollection struct{}
// field - data structure for creating a new bitfield macro object
// PAD_FUNC(NF3)
@ -22,8 +22,7 @@ type field struct {
// generate - wrapper for generating bitfield macros string
// fields : field structure
func generate(fields ...*field) {
macro := common.GetMacro()
func generate(macro *common.Macro, fields ...*field) {
var allhidden bool = true
for _, field := range fields {
if field.unhide {
@ -48,10 +47,9 @@ func generate(fields ...*field) {
}
// DecodeDW0 - decode value of DW0 register
func (FieldMacros) DecodeDW0() {
macro := common.GetMacro()
dw0 := macro.GetRegisterDW0()
generate(
func (FieldCollection) DecodeDW0(macro *common.Macro) *common.Macro {
dw0 := macro.Platform.GetRegisterDW0()
generate(macro,
&field{
prefix: "PAD_FUNC",
// TODO: Find another way to hide PAD_FUNC(GPIO) in the comment with
@ -128,13 +126,13 @@ func (FieldMacros) DecodeDW0() {
unhide: dw0.GetGPIOTXState() != 0,
},
)
return macro
}
// DecodeDW1 - decode value of DW1 register
func (FieldMacros) DecodeDW1() {
macro := common.GetMacro()
dw1 := macro.GetRegisterDW1()
generate(
func (FieldCollection) DecodeDW1(macro *common.Macro) *common.Macro {
dw1 := macro.Platform.GetRegisterDW1()
generate(macro,
&field{
name: "PAD_CFG1_TOL_1V8",
unhide: dw1.GetPadTol() != 0,
@ -164,14 +162,12 @@ func (FieldMacros) DecodeDW1() {
configurator: func() { macro.Own() },
},
)
return macro
}
// GenerateString - generates the entire string of bitfield macros.
func (bitfields FieldMacros) GenerateString() {
macro := common.GetMacro()
// GenerateMacro generates the field macro collection
func (f FieldCollection) GenerateMacro(macro *common.Macro) *common.Macro {
macro.Add("_PAD_CFG_STRUCT(").Id().Add(", ")
bitfields.DecodeDW0()
macro.Add(", ")
bitfields.DecodeDW1()
macro.Add("),")
f.DecodeDW0(macro).Add(", ")
return f.DecodeDW1(macro).Add("),")
}

6
util/intelp2m/fields/cb/cb_test.go
View file

@ -3,13 +3,15 @@ package cb_test
import (
"testing"
"review.coreboot.org/coreboot.git/util/intelp2m/fields/cb"
"review.coreboot.org/coreboot.git/util/intelp2m/config/p2m"
"review.coreboot.org/coreboot.git/util/intelp2m/fields/test"
)
// sliding-one
func TestCbFields(t *testing.T) {
p2m.SettingsReset()
p2m.Config.Field = p2m.CbFlds
referenceSlice := []string{
"_PAD_CFG_STRUCT(, PAD_FUNC(GPIO) | PAD_RESET(PLTRST), 0),",
"_PAD_CFG_STRUCT(, PAD_FUNC(GPIO) | PAD_RESET(DEEP), 0),",
@ -44,5 +46,5 @@ func TestCbFields(t *testing.T) {
"_PAD_CFG_STRUCT(, PAD_FUNC(GPIO) | (1 << 1), 0),",
"_PAD_CFG_STRUCT(, PAD_FUNC(GPIO) | 1, 0),",
}
test.SlidingOneTestSuiteCreate(referenceSlice).Run(t, "SLIDING-ONE-TEST", cb.FieldMacros{})
test.SlidingOneTestSuiteCreate(referenceSlice).Run(t, "SLIDING-ONE-TEST")
}

12
util/intelp2m/fields/fields.go
View file

@ -10,12 +10,12 @@ import (
// InterfaceSet - set the interface for decoding configuration
// registers DW0 and DW1.
func InterfaceGet() common.Fields {
var fldstylemap = map[p2m.FieldType]common.Fields{
p2m.NoFlds: cb.FieldMacros{}, // analyze fields using cb macros
p2m.CbFlds: cb.FieldMacros{},
p2m.FspFlds: fsp.FieldMacros{},
p2m.RawFlds: raw.FieldMacros{},
func Get() common.FieldsIf {
var fldstylemap = map[p2m.FieldType]common.FieldsIf{
p2m.NoFlds: cb.FieldCollection{}, // analyze fields using cb macros
p2m.CbFlds: cb.FieldCollection{},
p2m.FspFlds: fsp.FieldCollection{},
p2m.RawFlds: raw.FieldCollection{},
}
return fldstylemap[p2m.Config.Field]
}

55
util/intelp2m/fields/fsp/fsp.go
View file

@ -2,7 +2,7 @@ package fsp
import "review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
type FieldMacros struct{}
type FieldCollection struct{}
// field - data structure for creating a new bitfield macro object
// configmap : map to select the current configuration
@ -14,10 +14,8 @@ type field struct {
override func(configuration map[uint32]string, value uint32)
}
// generate - wrapper for generating bitfield macros string
// fields : field structure
func generate(fields ...*field) {
macro := common.GetMacro()
// generate() generates bitfield macro data struct
func generate(macro *common.Macro, fields ...*field) {
for _, field := range fields {
if field.override != nil {
// override if necessary
@ -35,9 +33,8 @@ func generate(fields ...*field) {
}
// DecodeDW0 - decode value of DW0 register
func (FieldMacros) DecodeDW0() {
macro := common.GetMacro()
dw0 := macro.GetRegisterDW0()
func (FieldCollection) DecodeDW0(macro *common.Macro) *common.Macro {
dw0 := macro.Platform.GetRegisterDW0()
ownershipStatus := func() uint32 {
if macro.IsOwnershipDriver() {
@ -46,7 +43,7 @@ func (FieldMacros) DecodeDW0() {
return 0
}
generate(
generate(macro,
&field{
configmap: map[uint32]string{
0: "GpioPadModeGpio",
@ -131,13 +128,13 @@ func (FieldMacros) DecodeDW0() {
value: dw0.GetResetConfig(),
},
)
return macro
}
// DecodeDW1 - decode value of DW1 register
func (FieldMacros) DecodeDW1() {
macro := common.GetMacro()
dw1 := macro.GetRegisterDW1()
generate(
// DecodeDW1() decodes DW1 register value and adds it to the macro string
func (FieldCollection) DecodeDW1(macro *common.Macro) *common.Macro {
dw1 := macro.Platform.GetRegisterDW1()
generate(macro,
&field{
override: func(configmap map[uint32]string, value uint32) {
if dw1.GetPadTol() != 0 {
@ -145,29 +142,27 @@ func (FieldMacros) DecodeDW1() {
}
},
},
&field{
configmap: map[uint32]string{
0x0: "GpioTermNone",
0x2: "GpioTermWpd5K",
0x4: "GpioTermWpd20K",
0x9: "GpioTermWpu1K",
0xa: "GpioTermWpu5K",
0xb: "GpioTermWpu2K",
0xc: "GpioTermWpu20K",
0xd: "GpioTermWpu1K2K",
0xf: "GpioTermNative",
0b0000: "GpioTermNone",
0b0010: "GpioTermWpd5K",
0b0100: "GpioTermWpd20K",
0b1001: "GpioTermWpu1K",
0b1010: "GpioTermWpu5K",
0b1011: "GpioTermWpu2K",
0b1100: "GpioTermWpu20K",
0b1101: "GpioTermWpu1K2K",
0b1111: "GpioTermNative",
},
value: dw1.GetTermination(),
},
)
return macro
}
// GenerateString - generates the entire string of bitfield macros.
func (bitfields FieldMacros) GenerateString() {
macro := common.GetMacro()
// GenerateMacro() generates the field macro collection and adds it to the macro string
func (f FieldCollection) GenerateMacro(macro *common.Macro) *common.Macro {
macro.Add("{ GPIO_SKL_H_").Id().Add(", { ")
bitfields.DecodeDW0()
bitfields.DecodeDW1()
macro.Add(" GpioPadConfigLock } },") // TODO: configure GpioPadConfigLock
f.DecodeDW0(macro)
return f.DecodeDW1(macro).Add(" GpioPadConfigLock } },") // TODO: configure GpioPadConfigLock
}

6
util/intelp2m/fields/fsp/fsp_test.go
View file

@ -3,11 +3,13 @@ package fsp_test
import (
"testing"
"review.coreboot.org/coreboot.git/util/intelp2m/fields/fsp"
"review.coreboot.org/coreboot.git/util/intelp2m/config/p2m"
"review.coreboot.org/coreboot.git/util/intelp2m/fields/test"
)
func TestFSPFields(t *testing.T) {
p2m.SettingsReset()
p2m.Config.Field = p2m.FspFlds
referenceSlice := []string{
"{ GPIO_SKL_H_, { GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInOut, GpioOutLow, GpioIntDis | GpioIntLevel, GpioPlatformReset, GpioTermNone, GpioPadConfigLock } },",
"{ GPIO_SKL_H_, { GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInOut, GpioOutLow, GpioIntDis | GpioIntLevel, GpioHostDeepReset, GpioTermNone, GpioPadConfigLock } },",
@ -42,5 +44,5 @@ func TestFSPFields(t *testing.T) {
"{ GPIO_SKL_H_, { GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInOut, GpioOutLow, GpioIntDis | GpioIntLevel, GpioResetPwrGood, GpioTermNone, GpioPadConfigLock } },",
"{ GPIO_SKL_H_, { GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInOut, GpioOutHigh, GpioIntDis | GpioIntLevel, GpioResetPwrGood, GpioTermNone, GpioPadConfigLock } },",
}
test.SlidingOneTestSuiteCreate(referenceSlice).Run(t, "SLIDING-ONE-TEST", fsp.FieldMacros{})
test.SlidingOneTestSuiteCreate(referenceSlice).Run(t, "SLIDING-ONE-TEST")
}

33
util/intelp2m/fields/raw/raw.go
View file

@ -1,29 +1,24 @@
package raw
import (
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
)
import "review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
type FieldMacros struct{}
type FieldCollection struct{}
func (FieldMacros) DecodeDW0() {
macro := common.GetMacro()
dw0 := macro.GetRegisterDW0()
macro.Add(dw0.String())
// DecodeDW0() decodes DW0 register value and adds it to the macro string
func (FieldCollection) DecodeDW0(macro *common.Macro) *common.Macro {
dw0 := macro.Platform.GetRegisterDW0()
return macro.Add(dw0.String())
}
func (FieldMacros) DecodeDW1() {
macro := common.GetMacro()
dw1 := macro.GetRegisterDW1()
macro.Add(dw1.String())
// DecodeDW1() decodes DW1 register value and adds it to the macro string
func (FieldCollection) DecodeDW1(macro *common.Macro) *common.Macro {
dw1 := macro.Platform.GetRegisterDW1()
return macro.Add(dw1.String())
}
// GenerateString - generates the entire string of bitfield macros.
func (bitfields FieldMacros) GenerateString() {
macro := common.GetMacro()
// GenerateMacro() generates the field macro collection and adds it to the macro string
func (f FieldCollection) GenerateMacro(macro *common.Macro) *common.Macro {
macro.Add("_PAD_CFG_STRUCT(").Id().Add(", ")
bitfields.DecodeDW0()
macro.Add(", ")
bitfields.DecodeDW1()
macro.Add("),")
f.DecodeDW0(macro).Add(", ")
return f.DecodeDW1(macro).Add("),")
}

6
util/intelp2m/fields/raw/raw_test.go
View file

@ -3,11 +3,13 @@ package raw_test
import (
"testing"
"review.coreboot.org/coreboot.git/util/intelp2m/fields/raw"
"review.coreboot.org/coreboot.git/util/intelp2m/config/p2m"
"review.coreboot.org/coreboot.git/util/intelp2m/fields/test"
)
func TestRAWFields(t *testing.T) {
p2m.SettingsReset()
p2m.Config.Field = p2m.RawFlds
referenceSlice := []string{
"_PAD_CFG_STRUCT(, 0x80000000, 0x80000000),",
"_PAD_CFG_STRUCT(, 0x40000000, 0x40000000),",
@ -42,5 +44,5 @@ func TestRAWFields(t *testing.T) {
"_PAD_CFG_STRUCT(, 0x00000002, 0x00000002),",
"_PAD_CFG_STRUCT(, 0x00000001, 0x00000001),",
}
test.SlidingOneTestSuiteCreate(referenceSlice).Run(t, "SLIDING-ONE-TEST", raw.FieldMacros{})
test.SlidingOneTestSuiteCreate(referenceSlice).Run(t, "SLIDING-ONE-TEST")
}

28
util/intelp2m/fields/test/suite.go
View file

@ -4,8 +4,9 @@ import (
"fmt"
"testing"
"review.coreboot.org/coreboot.git/util/intelp2m/fields"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/snr"
)
type TestCase struct {
@ -16,7 +17,7 @@ type TestCase struct {
func (tc TestCase) Check(actuallyMacro string) error {
if actuallyMacro != tc.Reference {
return fmt.Errorf(`TestCase: DW0 = %d, DW1 = %d, Ownership = %d:
return fmt.Errorf(`TestCase: DW0 = 0x%x, DW1 = 0x%x, Ownership = %d:
Expects: '%s'
Actually: '%s'`, tc.DW0, tc.DW1, tc.Ownership, tc.Reference, actuallyMacro)
}
@ -25,19 +26,20 @@ Actually: '%s'`, tc.DW0, tc.DW1, tc.Ownership, tc.Reference, actuallyMacro)
type Suite []TestCase
func (suite Suite) Run(t *testing.T, label string, decoderIf common.Fields) {
func (suite Suite) Run(t *testing.T, label string) {
t.Run(label, func(t *testing.T) {
platform := snr.PlatformSpecific{}
macro := common.GetInstanceMacro(platform, decoderIf)
dw0 := macro.GetRegisterDW0()
dw1 := macro.GetRegisterDW1()
for _, tc := range suite {
macro.Clear()
macro.PadIdSet("").SetPadOwnership(tc.Ownership)
dw0.Value = tc.DW0
dw1.Value = tc.DW1
macro.Fields.GenerateString()
if err := tc.Check(macro.Get()); err != nil {
constructor, err := platforms.GetConstructor()
if err != nil {
panic(err)
}
macro := common.CreateFrom(
"",
tc.Ownership == 1,
constructor(tc.DW0, tc.DW1),
fields.Get(),
)
if err := tc.Check(macro.Fields.GenerateMacro(&macro).String()); err != nil {
t.Errorf("Test failed: %v", err)
}
}

31
util/intelp2m/parser/parser.go
View file

@ -7,6 +7,7 @@ import (
"strings"
"review.coreboot.org/coreboot.git/util/intelp2m/config/p2m"
"review.coreboot.org/coreboot.git/util/intelp2m/fields"
"review.coreboot.org/coreboot.git/util/intelp2m/logs"
"review.coreboot.org/coreboot.git/util/intelp2m/parser/template"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms"
@ -35,13 +36,16 @@ type Entry struct {
Function string
DW0 uint32
DW1 uint32
Ownership uint8
Ownership bool
}
func (e *Entry) ToMacro() []string {
platform := platforms.GetSpecificInterface()
line := platform.GenMacro(e.ID, e.DW0, e.DW1, e.Ownership)
slices := strings.Split(line, "\n")
constructor, err := platforms.GetConstructor()
if err != nil {
panic(err)
}
macro := common.CreateFrom(e.ID, e.Ownership, constructor(e.DW0, e.DW1), fields.Get())
slices := strings.Split(macro.Generate(), "\n")
return slices
}
@ -49,7 +53,7 @@ func (e *Entry) ToMacro() []string {
func extractPad(line string) (Entry, error) {
function, id, dw0, dw1, err := template.Apply(line)
if err != nil {
logs.Errorf("%v", err)
logs.Errorf("extraction error: %v", err)
return Entry{EType: EntryEmpty}, err
}
@ -59,7 +63,7 @@ func extractPad(line string) (Entry, error) {
ID: id,
DW0: dw0,
DW1: dw1,
Ownership: 0,
Ownership: common.Acpi,
}
if dw0 == bits.All32 {
@ -79,12 +83,14 @@ func extractGroup(line string) Entry {
}
// Extract() extracts pad information from a string
func Extract(line string, platform platforms.SpecificIf) Entry {
func Extract(line string) Entry {
if included, _ := common.KeywordsCheck(line, "GPIO Community", "GPIO Group"); included {
return extractGroup(line)
}
if platform.KeywordCheck(line) {
if checkKeyword := platforms.GetKeywordChekingAction(); checkKeyword == nil {
logs.Errorf("information extraction error: skip line <%s>", line)
return Entry{EType: EntryEmpty}
} else if checkKeyword(line) {
pad, err := extractPad(line)
if err != nil {
logs.Errorf("extract pad info from %s: %v", line, err)
@ -100,11 +106,6 @@ func Extract(line string, platform platforms.SpecificIf) Entry {
func Run() ([]Entry, error) {
entries := make([]Entry, 0)
platform := platforms.GetSpecificInterface()
if platform == nil {
return nil, fmt.Errorf("unknown platform")
}
file, err := os.Open(p2m.Config.InputPath)
if err != nil {
err = fmt.Errorf("input file error: %v", err)
@ -117,7 +118,7 @@ func Run() ([]Entry, error) {
scanner := bufio.NewScanner(file)
for scanner.Scan() {
line := scanner.Text()
entry := Extract(line, platform)
entry := Extract(line)
if entry.EType != EntryEmpty {
entries = append(entries, entry)
}

41
util/intelp2m/platforms/adl/adl_test.go
View file

@ -3,108 +3,103 @@ package adl_test
import (
"testing"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/adl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/cnl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/snr"
"review.coreboot.org/coreboot.git/util/intelp2m/config/p2m"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/test"
)
func TestGenMacro(t *testing.T) {
alderlake := adl.PlatformSpecific{
InheritanceMacro: cnl.PlatformSpecific{
InheritanceMacro: snr.PlatformSpecific{},
},
}
p2m.Config.Platform = p2m.Alder
test.Suite{
{
Pad: test.Pad{ID: "GPP_A1", DW0: 0x11111111, DW1: 0x11111111, Ownership: 1},
Pad: test.Pad{ID: "GPP_A1", DW0: 0x11111111, DW1: 0x11111111, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_A1, DN_20K, RSMRST, NF4),",
Long: "_PAD_CFG_STRUCT(GPP_A1, PAD_FUNC(NF4) | PAD_RESET(RSMRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE) | (1 << 28) | 1, PAD_PULL(DN_20K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(DISPUPD) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_B2", DW0: 0x22222222, DW1: 0x22222222, Ownership: 0},
Pad: test.Pad{ID: "GPP_B2", DW0: 0x22222222, DW1: 0x22222222, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_TERM_GPO(GPP_B2, 0, INVALID, RSMRST),",
Long: "_PAD_CFG_STRUCT(GPP_B2, PAD_FUNC(GPIO) | PAD_RESET(RSMRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(RX_DISABLE) | (1 << 29) | (1 << 1), PAD_CFG1_TOL_1V8PAD_PULL(INVALID) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(ENPD)),",
},
},
{
Pad: test.Pad{ID: "GPP_C3", DW0: 0x44444444, DW1: 0x44444444, Ownership: 1},
Pad: test.Pad{ID: "GPP_C3", DW0: 0x44444444, DW1: 0x44444444, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_C3, INVALID, DEEP, NF1),",
Long: "_PAD_CFG_STRUCT(GPP_C3, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_IRQ_ROUTE(SMI), PAD_PULL(INVALID) | PAD_IOSSTATE(Tx0RxDCRx0) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_D4", DW0: 0x88888888, DW1: 0x88888888, Ownership: 0},
Pad: test.Pad{ID: "GPP_D4", DW0: 0x88888888, DW1: 0x88888888, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_D4, DN_5K, PLTRST, NF2),",
Long: "_PAD_CFG_STRUCT(GPP_D4, PAD_FUNC(NF2) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT), PAD_PULL(DN_5K) | PAD_IOSSTATE(Tx0RxDCRx1)),",
},
},
}.Run(t, "INTEL-ALDER-LAKE-PCH/SLIDING-ONE-IN-NIBBLE-TEST", alderlake)
}.Run(t, "INTEL-ALDER-LAKE-PCH/SLIDING-ONE-IN-NIBBLE-TEST")
test.Suite{
{
Pad: test.Pad{ID: "GPP_E5", DW0: 0xEEEEEEEE, DW1: 0xEEEEEEEE, Ownership: 1},
Pad: test.Pad{ID: "GPP_E5", DW0: 0xEEEEEEEE, DW1: 0xEEEEEEEE, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_E5, UP_2K, PWROK, NF3),",
Long: "_PAD_CFG_STRUCT(GPP_E5, PAD_FUNC(NF3) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_RX_POL(INVERT) | PAD_BUF(RX_DISABLE) | (1 << 29) | (1 << 1), PAD_CFG1_TOL_1V8PAD_PULL(UP_2K) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPD) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_F6", DW0: 0xDDDDDDDD, DW1: 0xDDDDDDDD, Ownership: 0},
Pad: test.Pad{ID: "GPP_F6", DW0: 0xDDDDDDDD, DW1: 0xDDDDDDDD, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_F6, INVALID, PWROK, NF7),",
Long: "_PAD_CFG_STRUCT(GPP_F6, PAD_FUNC(NF7) | PAD_TRIG(OFF) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 28) | 1, PAD_PULL(INVALID) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(DISPUPD)),",
},
},
{
Pad: test.Pad{ID: "GPP_G7", DW0: 0xBBBBBBBB, DW1: 0xBBBBBBBB, Ownership: 1},
Pad: test.Pad{ID: "GPP_G7", DW0: 0xBBBBBBBB, DW1: 0xBBBBBBBB, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_G7, INVALID, PLTRST, NF6),",
Long: "_PAD_CFG_STRUCT(GPP_G7, PAD_FUNC(NF6) | PAD_RESET(PLTRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(NMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(INVALID) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPU) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_H8", DW0: 0x77777777, DW1: 0x77777777, Ownership: 0},
Pad: test.Pad{ID: "GPP_H8", DW0: 0x77777777, DW1: 0x77777777, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_H8, UP_667, DEEP, NF5),",
Long: "_PAD_CFG_STRUCT(GPP_H8, PAD_FUNC(NF5) | PAD_RESET(DEEP) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(UP_667) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPU)),",
},
},
}.Run(t, "INTEL-ALDER-LAKE-PCH/SLIDING-ZERO-IN-NIBBLE-TEST", alderlake)
}.Run(t, "INTEL-ALDER-LAKE-PCH/SLIDING-ZERO-IN-NIBBLE-TEST")
test.Suite{
{
Pad: test.Pad{ID: "GPP_I9", DW0: 0x33333333, DW1: 0x33333333, Ownership: 1},
Pad: test.Pad{ID: "GPP_I9", DW0: 0x33333333, DW1: 0x33333333, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_I9, UP_20K, RSMRST, NF4),",
Long: "_PAD_CFG_STRUCT(GPP_I9, PAD_FUNC(NF4) | PAD_RESET(RSMRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(UP_20K) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPU) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_J10", DW0: 0x66666666, DW1: 0x66666666, Ownership: 0},
Pad: test.Pad{ID: "GPP_J10", DW0: 0x66666666, DW1: 0x66666666, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_J10, UP_1K, DEEP, NF1),",
Long: "_PAD_CFG_STRUCT(GPP_J10, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(RX_DISABLE) | (1 << 29) | (1 << 1), PAD_CFG1_TOL_1V8PAD_PULL(UP_1K) | PAD_IOSSTATE(TxDRxE) | PAD_IOSTERM(ENPD)),",
},
},
{
Pad: test.Pad{ID: "GPP_K11", DW0: 0xCCCCCCCC, DW1: 0xCCCCCCCC, Ownership: 1},
Pad: test.Pad{ID: "GPP_K11", DW0: 0xCCCCCCCC, DW1: 0xCCCCCCCC, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_K11, INVALID, PWROK, NF3),",
Long: "_PAD_CFG_STRUCT(GPP_K11, PAD_FUNC(NF3) | PAD_TRIG(OFF) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_RX_POL(INVERT), PAD_PULL(INVALID) | PAD_IOSSTATE(Tx1RxDCRx0) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_R12", DW0: 0x99999999, DW1: 0x99999999, Ownership: 0},
Pad: test.Pad{ID: "GPP_R12", DW0: 0x99999999, DW1: 0x99999999, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_R12, INVALID, PLTRST, NF6),",
Long: "_PAD_CFG_STRUCT(GPP_R12, PAD_FUNC(NF6) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 28) | 1, PAD_PULL(INVALID) | PAD_IOSSTATE(Tx1RxE) | PAD_IOSTERM(DISPUPD)),",
},
},
}.Run(t, "INTEL-ALDER-LAKE-PCH/SLIDING-ONE-ONE-IN-NIBBLE-TEST", alderlake)
}.Run(t, "INTEL-ALDER-LAKE-PCH/SLIDING-ONE-ONE-IN-NIBBLE-TEST")
}

112
util/intelp2m/platforms/adl/macro.go
View file

@ -1,113 +1,57 @@
package adl
import (
"fmt"
"strings"
"review.coreboot.org/coreboot.git/util/intelp2m/fields"
"review.coreboot.org/coreboot.git/util/intelp2m/logs"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/cnl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common/register/bits"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/snr"
)
const (
PAD_CFG_DW0_RO_FIELDS = (0x1 << 27) | (0x1 << 24) | (0x3 << 21) | (0xf << 16) | 0xfc
PAD_CFG_DW1_RO_FIELDS = 0xfdffc3ff
DW0Mask uint32 = (0b1 << 27) | (0b1 << 24) | (0b11 << 21) | (0b1111 << 16) | 0b11111100
DW1Mask uint32 = 0b11111101111111111100001111111111
)
type InheritanceMacro interface {
Pull()
GpiMacroAdd()
GpoMacroAdd()
NativeFunctionMacroAdd()
NoConnMacroAdd()
type BasePlatform struct {
// based on the Cannon Lake platform
cnl.BasePlatform
}
type PlatformSpecific struct {
InheritanceMacro
func InitBasePlatform(dw0, dw0mask uint32, dw1, dw1mask uint32) BasePlatform {
return BasePlatform{cnl.InitBasePlatform(dw0, dw0mask, dw1, dw1mask)}
}
// RemmapRstSrc - remmap Pad Reset Source Config
func (PlatformSpecific) RemmapRstSrc() {
macro := common.GetMacro()
if strings.Contains(macro.PadIdGet(), "GPD") {
func GetPlatform(dw0, dw1 uint32) common.PlatformIf {
p := InitBasePlatform(dw0, DW0Mask, dw1, DW1Mask)
return &p
}
// Override BasePlatform.RemapRstSrc()
func (p *BasePlatform) RemapRstSrc(m *common.Macro) {
if strings.Contains(m.GetPadId(), "GPD") {
// See reset map for the Alderlake GPD Group in the Community 2:
// https://github.com/coreboot/coreboot/blob/master/src/soc/intel/alderlake/gpio.c#L21
// remmap is not required because it is the same as common.
return
}
dw0 := macro.GetRegisterDW0()
remapping := map[uint32]uint32{
0: (bits.RstCfgRSMRST << bits.DW0PadRstCfg),
1: (bits.RstCfgDEEP << bits.DW0PadRstCfg),
2: (bits.RstCfgPLTRST << bits.DW0PadRstCfg),
3: (bits.RstCfgPWROK << bits.DW0PadRstCfg),
0b00: bits.RstCfgRSMRST << bits.DW0PadRstCfg,
0b01: bits.RstCfgDEEP << bits.DW0PadRstCfg,
0b10: bits.RstCfgPLTRST << bits.DW0PadRstCfg,
0b11: bits.RstCfgPWROK << bits.DW0PadRstCfg,
}
resetsrc, valid := remapping[dw0.GetResetConfig()]
dw0 := p.GetRegisterDW0()
source, valid := remapping[dw0.GetResetConfig()]
if valid {
// dw0.SetResetConfig(resetsrc)
ResetConfigFieldVal := (dw0.Value & 0x3fffffff) | remapping[dw0.GetResetConfig()]
dw0.Value = ResetConfigFieldVal
dw0.Value &= 0x3fffffff
dw0.Value |= source
} else {
fmt.Println("Invalid Pad Reset Config [ 0x", resetsrc, " ] for ", macro.PadIdGet())
logs.Errorf("%s: skip re-mapping: DW0 %s: invalid reset config source value 0b%b",
m.GetPadId(), dw0, dw0.GetResetConfig())
}
dw0.CntrMaskFieldsClear(0b11 << bits.DW0PadRstCfg)
}
// Adds The Pad Termination (TERM) parameter from PAD_CFG_DW1 to the macro
// as a new argument
func (platform PlatformSpecific) Pull() {
platform.InheritanceMacro.Pull()
}
// Adds PAD_CFG_GPI macro with arguments
func (platform PlatformSpecific) GpiMacroAdd() {
platform.InheritanceMacro.GpiMacroAdd()
}
// Adds PAD_CFG_GPO macro with arguments
func (platform PlatformSpecific) GpoMacroAdd() {
platform.InheritanceMacro.GpoMacroAdd()
}
// Adds PAD_CFG_NF macro with arguments
func (platform PlatformSpecific) NativeFunctionMacroAdd() {
platform.InheritanceMacro.NativeFunctionMacroAdd()
}
// Adds PAD_NC macro
func (platform PlatformSpecific) NoConnMacroAdd() {
platform.InheritanceMacro.NoConnMacroAdd()
}
// GenMacro - generate pad macro
// dw0Val : DW0 config register value
// dw1Val : DW1 config register value
// return: string of macro
// error
func (PlatformSpecific) GenMacro(id string, dw0Val uint32, dw1Val uint32, ownership uint8) string {
macro := common.GetInstanceMacro(
PlatformSpecific{
InheritanceMacro: cnl.PlatformSpecific{
InheritanceMacro: snr.PlatformSpecific{},
},
},
fields.InterfaceGet(),
)
macro.Clear()
dw0 := macro.GetRegisterDW0()
dw0.CntrMaskFieldsClear(bits.All32)
dw1 := macro.GetRegisterDW1()
dw1.CntrMaskFieldsClear(bits.All32)
dw0.Value = dw0Val
dw1.Value = dw1Val
dw0.ReadOnly = PAD_CFG_DW0_RO_FIELDS
dw1.ReadOnly = PAD_CFG_DW1_RO_FIELDS
macro.PadIdSet(id).SetPadOwnership(ownership)
return macro.Generate()
mask := bits.DW0[bits.DW0PadRstCfg]
dw0.CntrMaskFieldsClear(mask)
}

14
util/intelp2m/platforms/adl/template.go
View file

@ -2,14 +2,12 @@ package adl
import "review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
// Group : "GPP_A", "GPP_B", "GPP_C", "GPP_D", "GPP_E", "GPP_F", "GPP_G",
// "GPP_H", "GPP_I", "GPP_J", "GPP_K", "GPP_R", "GPP_S", "GPP_T",
// "GPD", "VGPIO_USB", "VGPIO_PCIE"
// KeywordCheck - This function is used to filter parsed lines of the configuration file and
// returns true if the keyword is contained in the line.
// line : string from the configuration file
func (PlatformSpecific) KeywordCheck(line string) bool {
// CheckKeyword() parses lines of the configuration file and returns true if the keyword is
// contained in the line
// "GPP_A", "GPP_B", "GPP_C", "GPP_D", "GPP_E", "GPP_F", "GPP_G",
// "GPP_H", "GPP_I", "GPP_J", "GPP_K", "GPP_R", "GPP_S", "GPP_T",
// "GPD", "VGPIO_USB", "VGPIO_PCIE"
func CheckKeyword(line string) bool {
isIncluded, _ := common.KeywordsCheck(line, "GPP_", "GPD", "VGPIO")
return isIncluded
}

53
util/intelp2m/platforms/apl/apl_test.go
View file

@ -3,165 +3,166 @@ package apl_test
import (
"testing"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/apl"
"review.coreboot.org/coreboot.git/util/intelp2m/config/p2m"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/test"
)
func TestGenMacro(t *testing.T) {
apollolake := apl.PlatformSpecific{}
p2m.Config.Platform = p2m.Apollo
test.Suite{
{ /* GPIO_0 - GPIO */
Pad: test.Pad{ID: "GPIO_0", DW0: 0x44000300, DW1: 0x1003d000, Ownership: 0},
Pad: test.Pad{ID: "GPIO_0", DW0: 0x44000300, DW1: 0x1003d000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPIO_HI_Z(GPIO_0, DN_20K, DEEP, IGNORE, SAME),",
Long: "_PAD_CFG_STRUCT(GPIO_0, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE)),",
},
},
{ /* GPIO_15 - GPIO */
Pad: test.Pad{ID: "GPIO_15", DW0: 0x44000000, DW1: 0x10001000, Ownership: 0},
Pad: test.Pad{ID: "GPIO_15", DW0: 0x44000000, DW1: 0x10001000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPIO_BIDIRECT(GPIO_15, 0, DN_20K, DEEP, OFF, ACPI),",
Long: "_PAD_CFG_STRUCT(GPIO_15, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF), PAD_PULL(DN_20K)),",
},
},
{ /* GPIO_16 - GPIO */
Pad: test.Pad{ID: "GPIO_16", DW0: 0x44000003, DW1: 0x10003000, Ownership: 0},
Pad: test.Pad{ID: "GPIO_16", DW0: 0x44000003, DW1: 0x10003000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPIO_BIDIRECT(GPIO_16, 1, UP_20K, DEEP, OFF, ACPI),",
Long: "_PAD_CFG_STRUCT(GPIO_16, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1) | 1, PAD_PULL(UP_20K)),",
},
},
{ /* GPIO_18 - GPIO */
Pad: test.Pad{ID: "GPIO_18", DW0: 0x44000102, DW1: 0x10003000, Ownership: 0},
Pad: test.Pad{ID: "GPIO_18", DW0: 0x44000102, DW1: 0x10003000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPI_TRIG_OWN(GPIO_18, UP_20K, DEEP, OFF, ACPI),",
Long: "_PAD_CFG_STRUCT(GPIO_18, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), PAD_PULL(UP_20K)),",
},
},
{ /* GPIO_21 - GPIO */
Pad: test.Pad{ID: "GPIO_21", DW0: 0x44000102, DW1: 0x10027000, Ownership: 0},
Pad: test.Pad{ID: "GPIO_21", DW0: 0x44000102, DW1: 0x10027000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPI_TRIG_IOSSTATE_OWN(GPIO_21, UP_20K, DEEP, OFF, TxDRxE, ACPI),",
Long: "_PAD_CFG_STRUCT(GPIO_21, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), PAD_PULL(UP_20K) | PAD_IOSSTATE(TxDRxE)),",
},
},
{ /* GPIO_22 - GPIO */
Pad: test.Pad{ID: "GPIO_22", DW0: 0x44800102, DW1: 0x10024100, Ownership: 1},
Pad: test.Pad{ID: "GPIO_22", DW0: 0x44800102, DW1: 0x10024100, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_GPI_TRIG_IOS_OWN(GPIO_22, NONE, DEEP, OFF, TxDRxE, DISPUPD, DRIVER),",
Long: "_PAD_CFG_STRUCT(GPIO_22, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), PAD_IOSSTATE(TxDRxE) | PAD_IOSTERM(DISPUPD) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{ /* GPIO_25 - GPIO */
Pad: test.Pad{ID: "GPIO_25", DW0: 0x40880102, DW1: 0x00027100, Ownership: 0},
Pad: test.Pad{ID: "GPIO_25", DW0: 0x40880102, DW1: 0x00027100, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPI_SCI_IOS(GPIO_25, UP_20K, DEEP, LEVEL, INVERT, TxDRxE, DISPUPD),",
Long: "_PAD_CFG_STRUCT(GPIO_25, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), PAD_PULL(UP_20K) | PAD_IOSSTATE(TxDRxE) | PAD_IOSTERM(DISPUPD)),",
},
},
{ /* GPIO_26 - SATA_LEDN */
Pad: test.Pad{ID: "GPIO_26", DW0: 0x44001400, DW1: 0x00003c00, Ownership: 1},
Pad: test.Pad{ID: "GPIO_26", DW0: 0x44001400, DW1: 0x00003c00, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPIO_26, NATIVE, DEEP, NF5),",
Long: "_PAD_CFG_STRUCT(GPIO_26, PAD_FUNC(NF5) | PAD_RESET(DEEP) | PAD_TRIG(OFF), PAD_PULL(NATIVE) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{ /* GPIO_27 - GPIO */
Pad: test.Pad{ID: "GPIO_27", DW0: 0x42880102, DW1: 0x00024100, Ownership: 0},
Pad: test.Pad{ID: "GPIO_27", DW0: 0x42880102, DW1: 0x00024100, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPI_SCI_IOS(GPIO_27, NONE, DEEP, EDGE_SINGLE, INVERT, TxDRxE, DISPUPD),",
Long: "_PAD_CFG_STRUCT(GPIO_27, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), PAD_IOSSTATE(TxDRxE) | PAD_IOSTERM(DISPUPD)),",
},
},
{ /* TDI - JTAG_TDI */
Pad: test.Pad{ID: "TDI", DW0: 0x44000700, DW1: 0x00c00000, Ownership: 0},
Pad: test.Pad{ID: "TDI", DW0: 0x44000700, DW1: 0x00c00000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(TDI, NONE, DEEP, NF1),",
Long: "_PAD_CFG_STRUCT(TDI, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),",
},
},
{ /* CNV_BRI_DT - GPIO */
Pad: test.Pad{ID: "CNV_BRI_DT", DW0: 0x44000100, DW1: 0x1003d000, Ownership: 0},
Pad: test.Pad{ID: "CNV_BRI_DT", DW0: 0x44000100, DW1: 0x1003d000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPI_TRIG_IOSSTATE_OWN(CNV_BRI_DT, DN_20K, DEEP, OFF, IGNORE, ACPI),",
Long: "_PAD_CFG_STRUCT(CNV_BRI_DT, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), PAD_PULL(DN_20K) | PAD_IOSSTATE(IGNORE)),",
},
},
{ /* CNV_BRI_RSP - GPIO */
Pad: test.Pad{ID: "CNV_BRI_RSP", DW0: 0x44000201, DW1: 0x10003000, Ownership: 0},
Pad: test.Pad{ID: "CNV_BRI_RSP", DW0: 0x44000201, DW1: 0x10003000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_TERM_GPO(CNV_BRI_RSP, 1, UP_20K, DEEP),",
Long: "_PAD_CFG_STRUCT(CNV_BRI_RSP, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_PULL(UP_20K)),",
},
},
{ /* GPIO_188 - DDI0_DDC_SCL */
Pad: test.Pad{ID: "GPIO_188", DW0: 0x44000400, DW1: 0x0003fc00, Ownership: 0},
Pad: test.Pad{ID: "GPIO_188", DW0: 0x44000400, DW1: 0x0003fc00, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_188, NATIVE, DEEP, NF1),",
Long: "_PAD_CFG_STRUCT(GPIO_188, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF), PAD_PULL(NATIVE) | PAD_IOSSTATE(IGNORE)),",
},
},
{ /* GPIO_172 - SDCARD_CLK */
Pad: test.Pad{ID: "GPIO_172", DW0: 0x44000400, DW1: 0x00021100, Ownership: 0},
Pad: test.Pad{ID: "GPIO_172", DW0: 0x44000400, DW1: 0x00021100, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_172, DN_20K, DEEP, NF1, HIZCRx1, DISPUPD),",
Long: "_PAD_CFG_STRUCT(GPIO_172, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF), PAD_PULL(DN_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),",
},
},
{ /* GPIO_176 - SDCARD_D3 */
Pad: test.Pad{ID: "GPIO_176", DW0: 0x44000400, DW1: 0x00021000, Ownership: 0},
Pad: test.Pad{ID: "GPIO_176", DW0: 0x44000400, DW1: 0x00021000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF_IOSSTATE(GPIO_176, DN_20K, DEEP, NF1, HIZCRx1),",
Long: "_PAD_CFG_STRUCT(GPIO_176, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF), PAD_PULL(DN_20K) | PAD_IOSSTATE(HIZCRx1)),",
},
},
{ /* GPIO_177 - GPIO */
Pad: test.Pad{ID: "GPIO_177", DW0: 0x46000102, DW1: 0x10027000, Ownership: 1},
Pad: test.Pad{ID: "GPIO_177", DW0: 0x46000102, DW1: 0x10027000, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_GPI_TRIG_IOSSTATE_OWN(GPIO_177, UP_20K, DEEP, EDGE_BOTH, TxDRxE, DRIVER),",
Long: "_PAD_CFG_STRUCT(GPIO_177, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(EDGE_BOTH) | PAD_BUF(TX_DISABLE) | (1 << 1), PAD_PULL(UP_20K) | PAD_IOSSTATE(TxDRxE) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{ /* GPIO_186 - SDCARD_LVL_WP */
Pad: test.Pad{ID: "GPIO_186", DW0: 0x44000402, DW1: 0x00003000, Ownership: 0},
Pad: test.Pad{ID: "GPIO_186", DW0: 0x44000402, DW1: 0x00003000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPIO_186, UP_20K, DEEP, NF1),",
Long: "_PAD_CFG_STRUCT(GPIO_186, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | (1 << 1), PAD_PULL(UP_20K)),",
},
},
{ /* GPIO_182 - EMMC_RCLK */
Pad: test.Pad{ID: "GPIO_182", DW0: 0x44000400, DW1: 0x0001d000, Ownership: 0},
Pad: test.Pad{ID: "GPIO_182", DW0: 0x44000400, DW1: 0x0001d000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF_IOSSTATE(GPIO_182, DN_20K, DEEP, NF1, HIZCRx0),",
Long: "_PAD_CFG_STRUCT(GPIO_182, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF), PAD_PULL(DN_20K) | PAD_IOSSTATE(HIZCRx0)),",
},
},
{ /* LPC_CLKOUT0 - LPC_CLKOUT0 */
Pad: test.Pad{ID: "LPC_CLKOUT0", DW0: 0x44000400, DW1: 0x00020100, Ownership: 0},
Pad: test.Pad{ID: "LPC_CLKOUT0", DW0: 0x44000400, DW1: 0x00020100, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKOUT0, NONE, DEEP, NF1, HIZCRx1, DISPUPD),",
Long: "_PAD_CFG_STRUCT(LPC_CLKOUT0, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF), PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(DISPUPD)),",
},
},
}.Run(t, "INTEL-APOLLO-PCH/PAD-MAP", apollolake)
}.Run(t, "INTEL-APOLLO-PCH/PAD-MAP")
test.Suite{
{
Pad: test.Pad{ID: "GPP_1xx", DW0: 0xBFFFFFFF, DW1: 0xFFFFFFFF, Ownership: 1},
Pad: test.Pad{ID: "GPP_1xx", DW0: 0xBFFFFFFF, DW1: 0xFFFFFFFF, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_IOSSTATE_IOSTERM(GPP_1xx, NATIVE, PLTRST, NF7, IGNORE, ENPU),",
Long: "_PAD_CFG_STRUCT(GPP_1xx, PAD_FUNC(NF7) | PAD_RESET(PLTRST) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(NATIVE) | PAD_IOSSTATE(IGNORE) | PAD_IOSTERM(ENPU) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
}.Run(t, "INTEL-APOLLO-PCH/MASK", apollolake)
}.Run(t, "INTEL-APOLLO-PCH/MASK")
test.Suite{
{
Pad: test.Pad{ID: "GPP_2xx", DW0: 0x00000000, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_2xx", DW0: 0x00000000, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPIO_BIDIRECT(GPP_2xx, 0, NONE, PWROK, LEVEL, ACPI),",
Long: "_PAD_CFG_STRUCT(GPP_2xx, PAD_FUNC(GPIO), 0),",
},
},
}.Run(t, "INTEL-APOLLO-PCH/EMRTY", apollolake)
}.Run(t, "INTEL-APOLLO-PCH/EMRTY")
}

256
util/intelp2m/platforms/apl/macro.go
View file

@ -1,43 +1,47 @@
package apl
import (
"fmt"
"strconv"
"review.coreboot.org/coreboot.git/util/intelp2m/config/p2m"
"review.coreboot.org/coreboot.git/util/intelp2m/fields"
"review.coreboot.org/coreboot.git/util/intelp2m/logs"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common/register/bits"
)
const (
PAD_CFG_DW0_RO_FIELDS = (0x1 << 27) | (0x1 << 24) | (0x3 << 21) | (0xf << 16) | 0xfc
PAD_CFG_DW1_RO_FIELDS = 0xfffc00ff
DW0Mask uint32 = (0b1 << 27) | (0b1 << 24) | (0b11 << 21) | (0b1111 << 16) | 0b11111100
DW1Mask uint32 = 0b11111111111111000000000011111111
)
const (
PULL_NONE = 0x0 // 0 000: none
PULL_DN_5K = 0x2 // 0 010: 5k wpd (Only available on SMBus GPIOs)
PULL_DN_20K = 0x4 // 0 100: 20k wpd
// PULL_NONE = 0x8 // 1 000: none
PULL_UP_1K = 0x9 // 1 001: 1k wpu (Only available on I2C GPIOs)
PULL_UP_2K = 0xb // 1 011: 2k wpu (Only available on I2C GPIOs)
PULL_UP_20K = 0xc // 1 100: 20k wpu
PULL_UP_667 = 0xd // 1 101: 1k & 2k wpu (Only available on I2C GPIOs)
PULL_NATIVE = 0xf // 1 111: (optional) Native controller selected by Pad Mode
)
type BasePlatform struct {
common.BasePlatform
}
type PlatformSpecific struct{}
func InitBasePlatform(dw0, dw0mask uint32, dw1, dw1mask uint32) BasePlatform {
return BasePlatform{common.InitBasePlatform(dw0, dw0mask, dw1, dw1mask)}
}
// RemmapRstSrc - remmap Pad Reset Source Config
// remmap is not required because it is the same as common.
func (PlatformSpecific) RemmapRstSrc() {}
func GetPlatform(dw0, dw1 uint32) common.PlatformIf {
p := InitBasePlatform(dw0, DW0Mask, dw1, DW1Mask)
return &p
}
// RemapRstSrc() remaps Pad Reset Source Config
func (p *BasePlatform) RemapRstSrc(m *common.Macro) {}
// Pull() adds The Pad Termination (TERM) parameter from PAD_CFG_DW1 to the macro
func (p *BasePlatform) Pull(m *common.Macro) {
const (
PULL_NONE = 0b0000 // 0 000: none
PULL_DN_5K = 0b0010 // 0 010: 5k wpd (Only available on SMBus GPIOs)
PULL_DN_20K = 0b0100 // 0 100: 20k wpd
// PULL_NONE = 0b1000 // 1 000: none
PULL_UP_1K = 0b1001 // 1 001: 1k wpu (Only available on I2C GPIOs)
PULL_UP_2K = 0b1011 // 1 011: 2k wpu (Only available on I2C GPIOs)
PULL_UP_20K = 0b1100 // 1 100: 20k wpu
PULL_UP_667 = 0b1101 // 1 101: 1k & 2k wpu (Only available on I2C GPIOs)
PULL_NATIVE = 0b1111 // 1 111: (optional) Native controller selected by Pad Mode
)
// Adds The Pad Termination (TERM) parameter from DW1 to the macro as a new argument
// return: macro
func (PlatformSpecific) Pull() {
macro := common.GetMacro()
dw1 := macro.GetRegisterDW1()
var pull = map[uint32]string{
PULL_NONE: "NONE",
PULL_DN_5K: "DN_5K",
@ -48,259 +52,221 @@ func (PlatformSpecific) Pull() {
PULL_UP_667: "UP_667",
PULL_NATIVE: "NATIVE",
}
str, exist := pull[dw1.GetTermination()]
dw1 := p.GetRegisterDW1()
term, exist := pull[dw1.GetTermination()]
if !exist {
str = strconv.Itoa(int(dw1.GetTermination()))
fmt.Println("Error", macro.PadIdGet(), " invalid TERM value = ", str)
term = "INVALID"
logs.Errorf("%s: DW1 %s: invalid termination value 0b%b",
dw1, m.GetPadId(), dw1.GetTermination())
}
macro.Separator().Add(str)
m.Separator().Add(term)
}
// Generate macro to cause peripheral IRQ when configured in GPIO input mode
func ioApicRoute() bool {
macro := common.GetMacro()
dw0 := macro.GetRegisterDW0()
dw1 := macro.GetRegisterDW1()
if dw0.GetGPIOInputRouteIOxAPIC() == 0 {
func ioApicRoute(p *BasePlatform, m *common.Macro) bool {
if dw0 := p.GetRegisterDW0(); dw0.GetGPIOInputRouteIOxAPIC() == 0 {
return false
}
macro.Add("_APIC")
m.Add("_APIC")
dw1 := p.GetRegisterDW1()
if dw1.GetIOStandbyState() != 0 || dw1.GetIOStandbyTermination() != 0 {
// e.g. H1_PCH_INT_ODL
// PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, LEVEL, INVERT, TxDRxE, DISPUPD),
macro.Add("_IOS(").Id().Pull().Rstsrc().Trig().Invert().IOSstate().IOTerm()
m.Add("_IOS(").Id().Pull().Rstsrc().Trig().Invert().IOSstate().IOTerm()
} else {
// PAD_CFG_GPI_APIC(pad, pull, rst, trig, inv)
macro.Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
m.Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
}
macro.Add("),")
m.Add("),")
return true
}
// Generate macro to cause NMI when configured in GPIO input mode
func nmiRoute() bool {
macro := common.GetMacro()
if macro.GetRegisterDW0().GetGPIOInputRouteNMI() == 0 {
func nmiRoute(p *BasePlatform, m *common.Macro) bool {
if dw0 := p.GetRegisterDW0(); dw0.GetGPIOInputRouteNMI() == 0 {
return false
}
// e.g. PAD_CFG_GPI_NMI(GPIO_24, UP_20K, DEEP, LEVEL, INVERT),
macro.Add("_NMI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
m.Add("_NMI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
return true
}
// Generate macro to cause SCI when configured in GPIO input mode
func sciRoute() bool {
macro := common.GetMacro()
dw0 := macro.GetRegisterDW0()
dw1 := macro.GetRegisterDW1()
func sciRoute(p *BasePlatform, m *common.Macro) bool {
dw0 := p.GetRegisterDW0()
if dw0.GetGPIOInputRouteSCI() == 0 {
return false
}
dw1 := p.GetRegisterDW1()
if dw1.GetIOStandbyState() != 0 || dw1.GetIOStandbyTermination() != 0 {
// PAD_CFG_GPI_SCI_IOS(GPIO_141, NONE, DEEP, EDGE_SINGLE, INVERT, IGNORE, DISPUPD),
macro.Add("_SCI_IOS")
macro.Add("(").Id().Pull().Rstsrc().Trig().Invert().IOSstate().IOTerm()
m.Add("_SCI_IOS")
m.Add("(").Id().Pull().Rstsrc().Trig().Invert().IOSstate().IOTerm()
} else if dw0.GetRXLevelEdgeConfiguration()&0x1 != 0 {
// e.g. PAD_CFG_GPI_ACPI_SCI(GPP_G2, NONE, DEEP, YES),
macro.Add("_ACPI_SCI").Add("(").Id().Pull().Rstsrc().Invert()
m.Add("_ACPI_SCI").Add("(").Id().Pull().Rstsrc().Invert()
} else {
// e.g. PAD_CFG_GPI_SCI(GPP_B18, UP_20K, PLTRST, LEVEL, INVERT),
macro.Add("_SCI").Add("(").Id().Pull().Rstsrc().Trig().Invert()
m.Add("_SCI").Add("(").Id().Pull().Rstsrc().Trig().Invert()
}
macro.Add("),")
m.Add("),")
return true
}
// Generate macro to cause SMI when configured in GPIO input mode
func smiRoute() bool {
macro := common.GetMacro()
dw0 := macro.GetRegisterDW0()
dw1 := macro.GetRegisterDW1()
func smiRoute(p *BasePlatform, m *common.Macro) bool {
dw0 := p.GetRegisterDW0()
if dw0.GetGPIOInputRouteSMI() == 0 {
return false
}
dw1 := p.GetRegisterDW1()
if dw1.GetIOStandbyState() != 0 || dw1.GetIOStandbyTermination() != 0 {
// PAD_CFG_GPI_SMI_IOS(GPIO_41, UP_20K, DEEP, EDGE_SINGLE, NONE, IGNORE, SAME),
macro.Add("_SMI_IOS")
macro.Add("(").Id().Pull().Rstsrc().Trig().Invert().IOSstate().IOTerm()
m.Add("_SMI_IOS")
m.Add("(").Id().Pull().Rstsrc().Trig().Invert().IOSstate().IOTerm()
} else if dw0.GetRXLevelEdgeConfiguration()&0x1 != 0 {
// e.g. PAD_CFG_GPI_ACPI_SMI(GPP_I3, NONE, DEEP, YES),
macro.Add("_ACPI_SMI").Add("(").Id().Pull().Rstsrc().Invert()
m.Add("_ACPI_SMI").Add("(").Id().Pull().Rstsrc().Invert()
} else {
// e.g. PAD_CFG_GPI_SMI(GPP_E3, NONE, PLTRST, EDGE_SINGLE, NONE),
macro.Add("_SMI").Add("(").Id().Pull().Rstsrc().Trig().Invert()
m.Add("_SMI").Add("(").Id().Pull().Rstsrc().Trig().Invert()
}
macro.Add("),")
m.Add("),")
return true
}
// Generate macro for GPI port
func (PlatformSpecific) GpiMacroAdd() {
// AddGpiMacro() adds PAD_CFG_GPI macro with arguments
func (p *BasePlatform) AddGpiMacro(m *common.Macro) {
var ids []string
macro := common.GetMacro()
macro.Set("PAD_CFG_GPI")
for routeid, isRoute := range map[string]func() bool{
m.Set("PAD_CFG_GPI")
for routeid, isRoute := range map[string]func(*BasePlatform, *common.Macro) bool{
"IOAPIC": ioApicRoute,
"SCI": sciRoute,
"SMI": smiRoute,
"NMI": nmiRoute,
} {
if isRoute() {
if isRoute(p, m) {
ids = append(ids, routeid)
}
}
switch config, argc := p2m.Config, len(ids); argc {
case 0:
dw1 := macro.GetRegisterDW1()
dw1 := p.GetRegisterDW1()
isIOStandbyStateUsed := dw1.GetIOStandbyState() != 0
isIOStandbyTerminationUsed := dw1.GetIOStandbyTermination() != 0
if isIOStandbyStateUsed && !isIOStandbyTerminationUsed {
macro.Add("_TRIG_IOSSTATE_OWN(")
m.Add("_TRIG_IOSSTATE_OWN(")
// PAD_CFG_GPI_TRIG_IOSSTATE_OWN(pad, pull, rst, trig, iosstate, own)
macro.Id().Pull().Rstsrc().Trig().IOSstate().Own().Add("),")
m.Id().Pull().Rstsrc().Trig().IOSstate().Own().Add("),")
} else if isIOStandbyTerminationUsed {
macro.Add("_TRIG_IOS_OWN(")
m.Add("_TRIG_IOS_OWN(")
// PAD_CFG_GPI_TRIG_IOS_OWN(pad, pull, rst, trig, iosstate, iosterm, own)
macro.Id().Pull().Rstsrc().Trig().IOSstate().IOTerm().Own().Add("),")
m.Id().Pull().Rstsrc().Trig().IOSstate().IOTerm().Own().Add("),")
} else {
// PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, own)
macro.Add("_TRIG_OWN(").Id().Pull().Rstsrc().Trig().Own().Add("),")
m.Add("_TRIG_OWN(").Id().Pull().Rstsrc().Trig().Own().Add("),")
}
case 1:
// GPI with IRQ route
if config.IgnoredFields {
macro.SetPadOwnership(common.PAD_OWN_ACPI)
m.SetOwnershipAcpi()
}
case 2:
// PAD_CFG_GPI_DUAL_ROUTE(pad, pull, rst, trig, inv, route1, route2)
macro.Set("PAD_CFG_GPI_DUAL_ROUTE(").Id().Pull().Rstsrc().Trig().Invert()
macro.Add(", " + ids[0] + ", " + ids[1] + "),")
m.Set("PAD_CFG_GPI_DUAL_ROUTE(").Id().Pull().Rstsrc().Trig().Invert()
m.Add(", " + ids[0] + ", " + ids[1] + "),")
if config.IgnoredFields {
macro.SetPadOwnership(common.PAD_OWN_ACPI)
m.SetOwnershipAcpi()
}
default:
// Clear the control mask so that the check fails and "Advanced" macro is
// generated
macro.GetRegisterDW0().CntrMaskFieldsClear(bits.All32)
dw0 := p.GetRegisterDW0()
dw0.CntrMaskFieldsClear(bits.All32)
}
}
// Adds PAD_CFG_GPO macro with arguments
func (PlatformSpecific) GpoMacroAdd() {
macro := common.GetMacro()
dw0 := macro.GetRegisterDW0()
dw1 := macro.GetRegisterDW1()
term := dw1.GetTermination()
macro.Set("PAD_CFG")
// AddGpoMacro() adds PAD_CFG_GPO macro with arguments
func (p *BasePlatform) AddGpoMacro(m *common.Macro) {
m.Set("PAD_CFG")
dw1 := p.GetRegisterDW1()
if dw1.GetIOStandbyState() != 0 || dw1.GetIOStandbyTermination() != 0 {
// PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_91, 0, DEEP, NONE, Tx0RxDCRx0, DISPUPD),
// PAD_CFG_GPO_IOSSTATE_IOSTERM(pad, val, rst, pull, iosstate, ioterm)
macro.Add("_GPO_IOSSTATE_IOSTERM(").Id().Val().Rstsrc().Pull().IOSstate().IOTerm()
m.Add("_GPO_IOSSTATE_IOSTERM(").Id().Val().Rstsrc().Pull().IOSstate().IOTerm()
} else {
term := dw1.GetTermination()
if term != 0 {
// e.g. PAD_CFG_TERM_GPO(GPP_B23, 1, DN_20K, DEEP),
// PAD_CFG_TERM_GPO(pad, val, pull, rst)
macro.Add("_TERM")
m.Add("_TERM")
}
macro.Add("_GPO(").Id().Val()
m.Add("_GPO(").Id().Val()
if term != 0 {
macro.Pull()
m.Pull()
}
macro.Rstsrc()
m.Rstsrc()
}
macro.Add("),")
m.Add("),")
if dw0.GetRXLevelEdgeConfiguration() != bits.TrigOFF {
if dw0 := p.GetRegisterDW0(); dw0.GetRXLevelEdgeConfiguration() != bits.TrigOFF {
// ignore if trig = OFF is not set
dw0.CntrMaskFieldsClear(bits.DW0[bits.DW0RxLevelEdgeConfiguration])
}
}
// Adds PAD_CFG_NF macro with arguments
func (PlatformSpecific) NativeFunctionMacroAdd() {
macro := common.GetMacro()
dw1 := macro.GetRegisterDW1()
// AddNativeFunctionMacro() adds PAD_CFG_NF macro with arguments
func (p *BasePlatform) AddNativeFunctionMacro(m *common.Macro) {
m.Set("PAD_CFG_NF")
dw1 := p.GetRegisterDW1()
isIOStandbyStateUsed := dw1.GetIOStandbyState() != 0
isIOStandbyTerminationUsed := dw1.GetIOStandbyTermination() != 0
macro.Set("PAD_CFG_NF")
if !isIOStandbyTerminationUsed && isIOStandbyStateUsed {
if dw1.GetIOStandbyState() == bits.IOStateStandbyIgnore {
// PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SLP_S0_B, NONE, DEEP, NF1),
macro.Add("_IOSTANDBY_IGNORE(").Id().Pull().Rstsrc().Padfn()
m.Add("_IOSTANDBY_IGNORE(").Id().Pull().Rstsrc().Padfn()
} else {
// PAD_CFG_NF_IOSSTATE(GPIO_22, UP_20K, DEEP, NF2, TxDRxE),
macro.Add("_IOSSTATE(").Id().Pull().Rstsrc().Padfn().IOSstate()
m.Add("_IOSSTATE(").Id().Pull().Rstsrc().Padfn().IOSstate()
}
} else if isIOStandbyTerminationUsed {
// PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_103, NATIVE, DEEP, NF1, MASK, SAME),
macro.Add("_IOSSTATE_IOSTERM(").Id().Pull().Rstsrc().Padfn().IOSstate().IOTerm()
m.Add("_IOSSTATE_IOSTERM(").Id().Pull().Rstsrc().Padfn().IOSstate().IOTerm()
} else {
// e.g. PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1)
macro.Add("(").Id().Pull().Rstsrc().Padfn()
m.Add("(").Id().Pull().Rstsrc().Padfn()
}
macro.Add("),")
m.Add("),")
if dw0 := macro.GetRegisterDW0(); dw0.GetGPIORxTxDisableStatus() != 0 {
if dw0 := p.GetRegisterDW0(); dw0.GetGPIORxTxDisableStatus() != 0 {
// Since the bufbis parameter will be ignored for NF, we should clear
// the corresponding bits in the control mask.
dw0.CntrMaskFieldsClear(bits.DW0[bits.DW0RxTxBufDisable])
}
}
// Adds PAD_NC macro
func (PlatformSpecific) NoConnMacroAdd() {
macro := common.GetMacro()
dw0, dw1 := macro.GetRegisterDW0(), macro.GetRegisterDW1()
if dw1.GetIOStandbyState() == bits.IOStateTxDRxE {
// See comments in sunrise/macro.go : NoConnMacroAdd()
// AddNoConnMacro() adds PAD_NC macro
func (p *BasePlatform) AddNoConnMacro(m *common.Macro) {
if dw1 := p.GetRegisterDW1(); dw1.GetIOStandbyState() == bits.IOStateTxDRxE {
dw0 := p.GetRegisterDW0()
// See comments in sunrise/m.go : AddNoConnMacro()
if dw0.GetRXLevelEdgeConfiguration() != bits.TrigOFF {
dw0.CntrMaskFieldsClear(bits.DW0[bits.DW0RxLevelEdgeConfiguration])
}
if dw0.GetResetConfig() != 1 { // 1 = RST_DEEP
dw0.CntrMaskFieldsClear(bits.DW0[bits.DW0PadRstCfg])
}
// PAD_NC(OSC_CLK_OUT_1, DN_20K)
macro.Set("PAD_NC").Add("(").Id().Pull().Add("),")
m.Set("PAD_NC").Add("(").Id().Pull().Add("),")
return
}
// PAD_CFG_GPIO_HI_Z(GPIO_81, UP_20K, DEEP, HIZCRx0, DISPUPD),
macro.Set("PAD_CFG_GPIO_")
if macro.IsOwnershipDriver() {
if m.Set("PAD_CFG_GPIO_"); m.IsOwnershipDriver() {
// PAD_CFG_GPIO_DRIVER_HI_Z(GPIO_55, UP_20K, DEEP, HIZCRx1, ENPU),
macro.Add("DRIVER_")
m.Add("DRIVER_")
}
macro.Add("HI_Z(").Id().Pull().Rstsrc().IOSstate().IOTerm().Add("),")
}
// GenMacro - generate pad macro
// dw0Val : DW0 config register value
// dw1Val : DW1 config register value
// return: string of macro
func (PlatformSpecific) GenMacro(id string, dw0Val uint32, dw1Val uint32, ownership uint8) string {
macro := common.GetInstanceMacro(
PlatformSpecific{},
fields.InterfaceGet(),
)
macro.Clear()
dw0 := macro.GetRegisterDW0()
dw0.CntrMaskFieldsClear(bits.All32)
dw1 := macro.GetRegisterDW1()
dw1.CntrMaskFieldsClear(bits.All32)
dw0.Value = dw0Val
dw1.Value = dw1Val
dw0.ReadOnly = PAD_CFG_DW0_RO_FIELDS
dw1.ReadOnly = PAD_CFG_DW1_RO_FIELDS
macro.PadIdSet(id).SetPadOwnership(ownership)
return macro.Generate()
m.Add("HI_Z(").Id().Pull().Rstsrc().IOSstate().IOTerm().Add("),")
}

7
util/intelp2m/platforms/apl/template.go
View file

@ -2,10 +2,9 @@ package apl
import "review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
// KeywordCheck - This function is used to filter parsed lines of the configuration file and
// returns true if the keyword is contained in the line.
// line : string from the configuration file
func (PlatformSpecific) KeywordCheck(line string) bool {
// CheckKeyword() parses lines of the configuration file and returns true if the keyword is
// contained in the line
func CheckKeyword(line string) bool {
isIncluded, _ := common.KeywordsCheck(line,
"GPIO_", "TCK", "TRST_B", "TMS", "TDI", "CX_PMODE", "CX_PREQ_B", "JTAGX", "CX_PRDY_B",
"TDO", "CNV_BRI_DT", "CNV_BRI_RSP", "CNV_RGI_DT", "CNV_RGI_RSP", "SVID0_ALERT_B",

38
util/intelp2m/platforms/cnl/cnl_test.go
View file

@ -3,105 +3,103 @@ package cnl_test
import (
"testing"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/cnl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/snr"
"review.coreboot.org/coreboot.git/util/intelp2m/config/p2m"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/test"
)
func TestGenMacro(t *testing.T) {
cannonlake := cnl.PlatformSpecific{
InheritanceMacro: snr.PlatformSpecific{},
}
p2m.Config.Platform = p2m.Cannon
test.Suite{
{
Pad: test.Pad{ID: "GPP_A1", DW0: 0x11111111, DW1: 0x11111111, Ownership: 1},
Pad: test.Pad{ID: "GPP_A1", DW0: 0x11111111, DW1: 0x11111111, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_A1, DN_20K, PWROK, NF4),",
Long: "_PAD_CFG_STRUCT(GPP_A1, PAD_FUNC(NF4) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE) | (1 << 28) | 1, PAD_PULL(DN_20K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(DISPUPD) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_B2", DW0: 0x22222222, DW1: 0x22222222, Ownership: 0},
Pad: test.Pad{ID: "GPP_B2", DW0: 0x22222222, DW1: 0x22222222, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_TERM_GPO(GPP_B2, 0, INVALID, PWROK),",
Long: "_PAD_CFG_STRUCT(GPP_B2, PAD_FUNC(GPIO) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(RX_DISABLE) | (1 << 29) | (1 << 1), PAD_CFG1_TOL_1V8PAD_PULL(INVALID) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(ENPD)),",
},
},
{
Pad: test.Pad{ID: "GPP_G3", DW0: 0x44444444, DW1: 0x44444444, Ownership: 1},
Pad: test.Pad{ID: "GPP_G3", DW0: 0x44444444, DW1: 0x44444444, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_G3, INVALID, DEEP, NF1),",
Long: "_PAD_CFG_STRUCT(GPP_G3, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_IRQ_ROUTE(SMI), PAD_PULL(INVALID) | PAD_IOSSTATE(Tx0RxDCRx0) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_D4", DW0: 0x88888888, DW1: 0x88888888, Ownership: 0},
Pad: test.Pad{ID: "GPP_D4", DW0: 0x88888888, DW1: 0x88888888, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_D4, DN_5K, PLTRST, NF2),",
Long: "_PAD_CFG_STRUCT(GPP_D4, PAD_FUNC(NF2) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT), PAD_PULL(DN_5K) | PAD_IOSSTATE(Tx0RxDCRx1)),",
},
},
}.Run(t, "INTEL-CANNON-LAKE-PCH/SLIDING-ONE-IN-NIBBLE-TEST", cannonlake)
}.Run(t, "INTEL-CANNON-LAKE-PCH/SLIDING-ONE-IN-NIBBLE-TEST")
test.Suite{
{
Pad: test.Pad{ID: "GPP_F5", DW0: 0xEEEEEEEE, DW1: 0xEEEEEEEE, Ownership: 1},
Pad: test.Pad{ID: "GPP_F5", DW0: 0xEEEEEEEE, DW1: 0xEEEEEEEE, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_F5, UP_2K, RSMRST, NF3),",
Long: "_PAD_CFG_STRUCT(GPP_F5, PAD_FUNC(NF3) | PAD_RESET(RSMRST) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_RX_POL(INVERT) | PAD_BUF(RX_DISABLE) | (1 << 29) | (1 << 1), PAD_CFG1_TOL_1V8PAD_PULL(UP_2K) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPD) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_H6", DW0: 0xDDDDDDDD, DW1: 0xDDDDDDDD, Ownership: 0},
Pad: test.Pad{ID: "GPP_H6", DW0: 0xDDDDDDDD, DW1: 0xDDDDDDDD, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_H6, INVALID, RSMRST, NF7),",
Long: "_PAD_CFG_STRUCT(GPP_H6, PAD_FUNC(NF7) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 28) | 1, PAD_PULL(INVALID) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(DISPUPD)),",
},
},
{
Pad: test.Pad{ID: "GPD7", DW0: 0xBBBBBBBB, DW1: 0xBBBBBBBB, Ownership: 1},
Pad: test.Pad{ID: "GPD7", DW0: 0xBBBBBBBB, DW1: 0xBBBBBBBB, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPD7, INVALID, PLTRST, NF6),",
Long: "_PAD_CFG_STRUCT(GPD7, PAD_FUNC(NF6) | PAD_RESET(PLTRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(NMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(INVALID) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPU) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_C8", DW0: 0x77777777, DW1: 0x77777777, Ownership: 0},
Pad: test.Pad{ID: "GPP_C8", DW0: 0x77777777, DW1: 0x77777777, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_C8, UP_667, DEEP, NF5),",
Long: "_PAD_CFG_STRUCT(GPP_C8, PAD_FUNC(NF5) | PAD_RESET(DEEP) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(UP_667) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPU)),",
},
},
}.Run(t, "INTEL-CANNON-LAKE-PCH/SLIDING-ZERO-IN-NIBBLE-TEST", cannonlake)
}.Run(t, "INTEL-CANNON-LAKE-PCH/SLIDING-ZERO-IN-NIBBLE-TEST")
test.Suite{
{
Pad: test.Pad{ID: "GPP_E9", DW0: 0x33333333, DW1: 0x33333333, Ownership: 1},
Pad: test.Pad{ID: "GPP_E9", DW0: 0x33333333, DW1: 0x33333333, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_E9, UP_20K, RSMRST, NF4),",
Long: "_PAD_CFG_STRUCT(GPP_E9, PAD_FUNC(NF4) | PAD_RESET(RSMRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(UP_20K) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPU) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_A10", DW0: 0x66666666, DW1: 0x66666666, Ownership: 0},
Pad: test.Pad{ID: "GPP_A10", DW0: 0x66666666, DW1: 0x66666666, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_A10, UP_1K, DEEP, NF1),",
Long: "_PAD_CFG_STRUCT(GPP_A10, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(RX_DISABLE) | (1 << 29) | (1 << 1), PAD_CFG1_TOL_1V8PAD_PULL(UP_1K) | PAD_IOSSTATE(TxDRxE) | PAD_IOSTERM(ENPD)),",
},
},
{
Pad: test.Pad{ID: "GPP_B11", DW0: 0xCCCCCCCC, DW1: 0xCCCCCCCC, Ownership: 1},
Pad: test.Pad{ID: "GPP_B11", DW0: 0xCCCCCCCC, DW1: 0xCCCCCCCC, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_B11, INVALID, RSMRST, NF3),",
Long: "_PAD_CFG_STRUCT(GPP_B11, PAD_FUNC(NF3) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_RX_POL(INVERT), PAD_PULL(INVALID) | PAD_IOSSTATE(Tx1RxDCRx0) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_G12", DW0: 0x99999999, DW1: 0x99999999, Ownership: 0},
Pad: test.Pad{ID: "GPP_G12", DW0: 0x99999999, DW1: 0x99999999, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_G12, INVALID, PLTRST, NF6),",
Long: "_PAD_CFG_STRUCT(GPP_G12, PAD_FUNC(NF6) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 28) | 1, PAD_PULL(INVALID) | PAD_IOSSTATE(Tx1RxE) | PAD_IOSTERM(DISPUPD)),",
},
},
}.Run(t, "INTEL-CANNON-LAKE-PCH/SLIDING-ONE-ONE-IN-NIBBLE-TEST", cannonlake)
}.Run(t, "INTEL-CANNON-LAKE-PCH/SLIDING-ONE-ONE-IN-NIBBLE-TEST")
}

200
util/intelp2m/platforms/cnl/macro.go
View file

@ -1,149 +1,140 @@
package cnl
import (
"fmt"
"strings"
"review.coreboot.org/coreboot.git/util/intelp2m/config/p2m"
"review.coreboot.org/coreboot.git/util/intelp2m/fields"
"review.coreboot.org/coreboot.git/util/intelp2m/logs"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common/register/bits"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/snr"
)
const (
PAD_CFG_DW0_RO_FIELDS = (0x1 << 27) | (0x1 << 24) | (0x3 << 21) | (0xf << 16) | 0xfc
PAD_CFG_DW1_RO_FIELDS = 0xfdffc3ff
DW0Mask uint32 = (0b1 << 27) | (0b1 << 24) | (0b11 << 21) | (0b1111 << 16) | 0b11111100
DW1Mask uint32 = 0b11111101111111111100001111111111
)
type InheritanceMacro interface {
GpoMacroAdd()
NativeFunctionMacroAdd()
NoConnMacroAdd()
type BasePlatform struct {
// based on the Sunrise platform
snr.BasePlatform
}
type PlatformSpecific struct {
InheritanceMacro
InheritanceTemplate
func InitBasePlatform(dw0, dw0mask uint32, dw1, dw1mask uint32) BasePlatform {
return BasePlatform{snr.InitBasePlatform(dw0, dw0mask, dw1, dw1mask)}
}
// RemmapRstSrc - remmap Pad Reset Source Config
func (PlatformSpecific) RemmapRstSrc() {
macro := common.GetMacro()
if strings.Contains(macro.PadIdGet(), "GPP_A") ||
strings.Contains(macro.PadIdGet(), "GPP_B") ||
strings.Contains(macro.PadIdGet(), "GPP_G") {
func GetPlatform(dw0, dw1 uint32) common.PlatformIf {
p := InitBasePlatform(dw0, DW0Mask, dw1, DW1Mask)
return &p
}
// Override BasePlatform.RemapRstSrc()
func (p *BasePlatform) RemapRstSrc(m *common.Macro) {
if strings.Contains(m.GetPadId(), "GPP_A") ||
strings.Contains(m.GetPadId(), "GPP_B") ||
strings.Contains(m.GetPadId(), "GPP_G") {
// See reset map for the Cannonlake Groups the Community 0:
// https://github.com/coreboot/coreboot/blob/master/src/soc/intel/cannonlake/gpio.c#L14
// remmap is not required because it is the same as common.
return
}
dw0 := macro.GetRegisterDW0()
var remapping = map[uint32]uint32{
0: bits.RstCfgRSMRST << bits.DW0PadRstCfg,
1: bits.RstCfgDEEP << bits.DW0PadRstCfg,
2: bits.RstCfgPLTRST << bits.DW0PadRstCfg,
dw0 := p.GetRegisterDW0()
remapping := map[uint32]uint32{
0b00: bits.RstCfgRSMRST << bits.DW0PadRstCfg,
0b01: bits.RstCfgDEEP << bits.DW0PadRstCfg,
0b10: bits.RstCfgPLTRST << bits.DW0PadRstCfg,
}
resetsrc, valid := remapping[dw0.GetResetConfig()]
source, valid := remapping[dw0.GetResetConfig()]
if valid {
// dw0.SetResetConfig(resetsrc)
ResetConfigFieldVal := (dw0.Value & 0x3fffffff) | remapping[dw0.GetResetConfig()]
dw0.Value = ResetConfigFieldVal
dw0.Value &= 0x3fffffff
dw0.Value |= source
} else {
fmt.Println("Invalid Pad Reset Config [ 0x", resetsrc, " ] for ", macro.PadIdGet())
logs.Errorf("%s: skip re-mapping: DW0 %s: invalid reset config source value 0b%b",
m.GetPadId(), dw0, dw0.GetResetConfig())
}
mask := bits.DW0[bits.DW0PadRstCfg]
dw0.CntrMaskFieldsClear(mask)
}
// Adds The Pad Termination (TERM) parameter from PAD_CFG_DW1 to the macro
// as a new argument
func (PlatformSpecific) Pull() {
macro := common.GetMacro()
dw1 := macro.GetRegisterDW1()
// Override BasePlatform.Pull()
func (p *BasePlatform) Pull(m *common.Macro) {
dw1 := p.GetRegisterDW1()
var pull = map[uint32]string{
0x0: "NONE",
0x2: "DN_5K",
0x4: "DN_20K",
0x9: "UP_1K",
0xa: "UP_5K",
0xb: "UP_2K",
0xc: "UP_20K",
0xd: "UP_667",
0xf: "NATIVE",
0b0000: "NONE",
0b0010: "DN_5K",
0b0100: "DN_20K",
0b1001: "UP_1K",
0b1010: "UP_5K",
0b1011: "UP_2K",
0b1100: "UP_20K",
0b1101: "UP_667",
0b1111: "NATIVE",
}
str, valid := pull[dw1.GetTermination()]
term, valid := pull[dw1.GetTermination()]
if !valid {
str = "INVALID"
fmt.Println("Error",
macro.PadIdGet(),
" invalid TERM value = ",
int(dw1.GetTermination()))
term = "INVALID"
logs.Errorf("%s: DW1 %s: invalid termination value 0b%b",
dw1, m.GetPadId(), dw1.GetTermination())
}
macro.Separator().Add(str)
m.Separator().Add(term)
}
// Generate macro to cause peripheral IRQ when configured in GPIO input mode
func ioApicRoute() bool {
macro := common.GetMacro()
dw0 := macro.GetRegisterDW0()
// ioApicRoute() generate macro to cause peripheral IRQ when configured in GPIO input mode
func ioApicRoute(p *BasePlatform, m *common.Macro) bool {
dw0 := p.GetRegisterDW0()
if dw0.GetGPIOInputRouteIOxAPIC() == 0 {
return false
}
macro.Add("_APIC")
m.Add("_APIC")
// PAD_CFG_GPI_APIC(pad, pull, rst, trig, inv)
macro.Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
m.Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
return true
}
// Generate macro to cause NMI when configured in GPIO input mode
func nmiRoute() bool {
macro := common.GetMacro()
if macro.GetRegisterDW0().GetGPIOInputRouteNMI() == 0 {
// nmiRoute() generate macro to cause NMI when configured in GPIO input mode
func nmiRoute(p *BasePlatform, m *common.Macro) bool {
if dw0 := p.GetRegisterDW0(); dw0.GetGPIOInputRouteNMI() == 0 {
return false
}
// PAD_CFG_GPI_NMI(GPIO_24, UP_20K, DEEP, LEVEL, INVERT),
macro.Add("_NMI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
m.Add("_NMI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
return true
}
// Generate macro to cause SCI when configured in GPIO input mode
func sciRoute() bool {
macro := common.GetMacro()
if macro.GetRegisterDW0().GetGPIOInputRouteSCI() == 0 {
// sciRoute() generate macro to cause SCI when configured in GPIO input mode
func sciRoute(p *BasePlatform, m *common.Macro) bool {
if dw0 := p.GetRegisterDW0(); dw0.GetGPIOInputRouteSCI() == 0 {
return false
}
// PAD_CFG_GPI_SCI(pad, pull, rst, trig, inv)
macro.Add("_SCI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
m.Add("_SCI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
return true
}
// Generate macro to cause SMI when configured in GPIO input mode
func smiRoute() bool {
macro := common.GetMacro()
if macro.GetRegisterDW0().GetGPIOInputRouteSMI() == 0 {
// smiRoute() generates macro to cause SMI when configured in GPIO input mode
func smiRoute(p *BasePlatform, m *common.Macro) bool {
if dw0 := p.GetRegisterDW0(); dw0.GetGPIOInputRouteSMI() == 0 {
return false
}
// PAD_CFG_GPI_SMI(pad, pull, rst, trig, inv)
macro.Add("_SMI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
m.Add("_SMI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
return true
}
// Adds PAD_CFG_GPI macro with arguments
func (PlatformSpecific) GpiMacroAdd() {
macro := common.GetMacro()
// Override BasePlatform.AddGpiMacro()
func (p *BasePlatform) AddGpiMacro(m *common.Macro) {
var ids []string
macro.Set("PAD_CFG_GPI")
for routeid, isRoute := range map[string]func() bool{
m.Set("PAD_CFG_GPI")
for routeid, isRoute := range map[string]func(*BasePlatform, *common.Macro) bool{
"IOAPIC": ioApicRoute,
"SCI": sciRoute,
"SMI": smiRoute,
"NMI": nmiRoute,
} {
if isRoute() {
if isRoute(p, m) {
ids = append(ids, routeid)
}
}
@ -151,69 +142,26 @@ func (PlatformSpecific) GpiMacroAdd() {
switch argc := len(ids); argc {
case 0:
// e.g. PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, own)
macro.Add("_TRIG_OWN").Add("(").Id().Pull().Rstsrc().Trig().Own().Add("),")
m.Add("_TRIG_OWN").Add("(").Id().Pull().Rstsrc().Trig().Own().Add("),")
case 1:
// GPI with IRQ route
if p2m.Config.IgnoredFields {
// Set Host Software Ownership to ACPI mode
macro.SetPadOwnership(common.PAD_OWN_ACPI)
m.SetOwnershipAcpi()
}
case 2:
// PAD_CFG_GPI_DUAL_ROUTE(pad, pull, rst, trig, inv, route1, route2)
macro.Set("PAD_CFG_GPI_DUAL_ROUTE(").Id().Pull().Rstsrc().Trig().Invert()
macro.Add(", " + ids[0] + ", " + ids[1] + "),")
m.Set("PAD_CFG_GPI_DUAL_ROUTE(").Id().Pull().Rstsrc().Trig().Invert()
m.Add(", " + ids[0] + ", " + ids[1] + "),")
if p2m.Config.IgnoredFields {
// Set Host Software Ownership to ACPI mode
macro.SetPadOwnership(common.PAD_OWN_ACPI)
m.SetOwnershipAcpi()
}
default:
// Clear the control mask so that the check fails and "Advanced" macro is
// generated
macro.GetRegisterDW0().CntrMaskFieldsClear(bits.All32)
dw0 := p.GetRegisterDW0()
dw0.CntrMaskFieldsClear(bits.All32)
}
}
// Adds PAD_CFG_GPO macro with arguments
func (platform PlatformSpecific) GpoMacroAdd() {
platform.InheritanceMacro.GpoMacroAdd()
}
// Adds PAD_CFG_NF macro with arguments
func (platform PlatformSpecific) NativeFunctionMacroAdd() {
platform.InheritanceMacro.NativeFunctionMacroAdd()
}
// Adds PAD_NC macro
func (platform PlatformSpecific) NoConnMacroAdd() {
platform.InheritanceMacro.NoConnMacroAdd()
}
// GenMacro - generate pad macro
// dw0Val : DW0 config register value
// dw1Val : DW1 config register value
// return: string of macro
func (PlatformSpecific) GenMacro(id string, dw0Val uint32, dw1Val uint32, ownership uint8) string {
macro := common.GetInstanceMacro(
PlatformSpecific{
InheritanceMacro: snr.PlatformSpecific{},
},
fields.InterfaceGet(),
)
macro.Clear()
dw0 := macro.GetRegisterDW0()
dw0.CntrMaskFieldsClear(bits.All32)
dw1 := macro.GetRegisterDW1()
dw1.CntrMaskFieldsClear(bits.All32)
dw0.Value = dw0Val
dw1.Value = dw1Val
dw0.ReadOnly = PAD_CFG_DW0_RO_FIELDS
dw1.ReadOnly = PAD_CFG_DW1_RO_FIELDS
macro.PadIdSet(id).SetPadOwnership(ownership)
return macro.Generate()
}

17
util/intelp2m/platforms/cnl/template.go
View file

@ -1,14 +1,11 @@
package cnl
type InheritanceTemplate interface {
KeywordCheck(line string) bool
}
import "review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
// Group: "GPP_A", "GPP_B", "GPP_G", "GPP_D", "GPP_F", "GPP_H", "GPD", "GPP_C", "GPP_E"
// KeywordCheck - This function is used to filter parsed lines of the configuration file and
// returns true if the keyword is contained in the line.
// line : string from the configuration file
func (platform PlatformSpecific) KeywordCheck(line string) bool {
return platform.InheritanceTemplate.KeywordCheck(line)
// CheckKeyword() parses lines of the configuration file and returns true if the keyword is
// contained in the line
// "GPP_A", "GPP_B", "GPP_G", "GPP_D", "GPP_F", "GPP_H", "GPD", "GPP_C", "GPP_E"
func CheckKeyword(line string) bool {
included, _ := common.KeywordsCheck(line, "GPP_", "GPD")
return included
}

25
util/intelp2m/platforms/common/common.go Normal file
View file

@ -0,0 +1,25 @@
package common
import (
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common/register"
)
type BasePlatform struct {
dw0 register.DW0
dw1 register.DW1
}
func InitBasePlatform(dw0, dw0Mask uint32, dw1, dw1Mask uint32) BasePlatform {
return BasePlatform{
register.SetVal[register.DW0](dw0, dw0Mask),
register.SetVal[register.DW1](dw1, dw1Mask),
}
}
func (p *BasePlatform) GetRegisterDW0() *register.DW0 {
return &p.dw0
}
func (p *BasePlatform) GetRegisterDW1() *register.DW1 {
return &p.dw1
}

453
util/intelp2m/platforms/common/macro.go
View file

@ -3,133 +3,113 @@ package common
import (
"fmt"
"strconv"
"sync"
"review.coreboot.org/coreboot.git/util/intelp2m/config/p2m"
"review.coreboot.org/coreboot.git/util/intelp2m/logs"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common/register"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common/register/bits"
)
type Fields interface {
DecodeDW0()
DecodeDW1()
GenerateString()
}
const (
PAD_OWN_ACPI = 0
PAD_OWN_DRIVER = 1
Driver bool = true
Acpi bool = false
)
// PlatformSpecific - platform-specific interface
type PlatformSpecific interface {
RemmapRstSrc()
Pull()
GpiMacroAdd()
GpoMacroAdd()
NativeFunctionMacroAdd()
NoConnMacroAdd()
type FieldsIf interface {
DecodeDW0(*Macro) *Macro
DecodeDW1(*Macro) *Macro
GenerateMacro(*Macro) *Macro
}
type PlatformIf interface {
RemapRstSrc(*Macro)
Pull(*Macro)
AddGpiMacro(*Macro)
AddGpoMacro(*Macro)
AddNativeFunctionMacro(*Macro)
AddNoConnMacro(*Macro)
GetRegisterDW0() *register.DW0
GetRegisterDW1() *register.DW1
}
// Macro - contains macro information and methods
// Platform : platform-specific interface
// padID : pad ID string
// str : macro string entirely
// Reg : structure of configuration register values and their masks
type Macro struct {
Platform PlatformSpecific
DW0 register.DW0
DW1 register.DW1
padID string
str string
ownership uint8
Fields
line string
id string
ownership bool
Platform PlatformIf
Fields FieldsIf
}
var instanceMacro *Macro
var once sync.Once
// GetInstance returns singleton
func GetInstanceMacro(p PlatformSpecific, f Fields) *Macro {
once.Do(func() {
instanceMacro = &Macro{Platform: p, Fields: f}
})
return instanceMacro
}
func GetMacro() *Macro {
return GetInstanceMacro(nil, nil)
}
func (macro *Macro) PadIdGet() string {
return macro.padID
}
func (macro *Macro) PadIdSet(padid string) *Macro {
macro.padID = padid
return macro
}
func (macro *Macro) SetPadOwnership(own uint8) *Macro {
macro.ownership = own
return macro
}
func (macro *Macro) IsOwnershipDriver() bool {
return macro.ownership == PAD_OWN_DRIVER
}
func (macro *Macro) GetRegisterDW0() *register.DW0 {
return &macro.DW0
}
func (macro *Macro) GetRegisterDW1() *register.DW1 {
return &macro.DW1
}
// add a string to macro
func (macro *Macro) Add(str string) *Macro {
macro.str += str
return macro
}
// set a string in a macro instead of its previous contents
func (macro *Macro) Set(str string) *Macro {
macro.str = str
return macro
}
// get macro string
func (macro *Macro) Get() string {
return macro.str
}
// set a string in a macro instead of its previous contents
func (macro *Macro) Clear() *Macro {
macro.Set("")
return macro
}
// Adds PAD Id to the macro as a new argument
// return: Macro
func (macro *Macro) Id() *Macro {
return macro.Add(macro.padID)
}
// Add Separator to macro if needed
func (macro *Macro) Separator() *Macro {
str := macro.Get()
c := str[len(str)-1]
if c != '(' && c != '_' {
macro.Add(", ")
func CreateFrom(id string, ownership bool, pi PlatformIf, fi FieldsIf) Macro {
return Macro{
id: id,
ownership: ownership,
Platform: pi,
Fields: fi,
}
return macro
}
// Adds the PADRSTCFG parameter from DW0 to the macro as a new argument
// return: Macro
func (macro *Macro) Rstsrc() *Macro {
dw0 := macro.GetRegisterDW0()
func (m *Macro) String() string {
return m.line
}
func (m *Macro) GetPadId() string {
return m.id
}
func (m Macro) IsOwnershipDriver() bool {
return m.ownership
}
func (m *Macro) SetOwnershipAcpi() {
m.ownership = Acpi
}
func (m *Macro) SetOwnershipDriver() {
m.ownership = Driver
}
func (m *Macro) Add(str string) *Macro {
m.line += str
return m
}
func (m *Macro) Set(str string) *Macro {
m.line = str
return m
}
func (m *Macro) Clear() *Macro {
m.line = ""
return m
}
// Id() adds Pad Id to the macro string
func (m *Macro) Id() *Macro {
return m.Add(m.id)
}
// Separator() adds separator ", " to macro if needed
func (m *Macro) Separator() *Macro {
line := m.line
c := line[len(line)-1]
if c != '(' && c != '_' {
m.Add(", ")
}
return m
}
// or - Set " | " if its needed
func (m *Macro) Or() *Macro {
if str := m.line; str[len(str)-1] == ')' {
m.Add(" | ")
}
return m
}
// Rstsrc() adds PADRSTCFG parameter
func (m *Macro) Rstsrc() *Macro {
dw0 := m.Platform.GetRegisterDW0()
resetsrc := map[uint32]string{
0b00: "PWROK",
0b01: "DEEP",
@ -138,29 +118,28 @@ func (macro *Macro) Rstsrc() *Macro {
}
source, exist := resetsrc[dw0.GetResetConfig()]
if !exist {
logs.Errorf("%s: ResetConfig error: map does not contain %d",
m.id, dw0.GetResetConfig())
source = "ERROR"
}
return macro.Separator().Add(source)
return m.Separator().Add(source)
}
// Adds The Pad Termination (TERM) parameter from DW1 to the macro as a new argument
// return: Macro
func (macro *Macro) Pull() *Macro {
macro.Platform.Pull()
return macro
// Pull() adds Pad Termination TERM parameter
func (m *Macro) Pull() *Macro {
m.Platform.Pull(m)
return m
}
// Adds Pad GPO value to macro string as a new argument
// return: Macro
func (macro *Macro) Val() *Macro {
dw0 := macro.GetRegisterDW0()
return macro.Separator().Add(strconv.Itoa(int(dw0.GetGPIOTXState())))
// Val() adds pad GPO value to macro string
func (m *Macro) Val() *Macro {
dw0 := m.Platform.GetRegisterDW0()
return m.Separator().Add(strconv.Itoa(int(dw0.GetGPIOTXState())))
}
// Adds Pad GPO value to macro string as a new argument
// return: Macro
func (macro *Macro) Trig() *Macro {
dw0 := macro.GetRegisterDW0()
// Trig() adds Pad GPO value to macro string
func (m *Macro) Trig() *Macro {
dw0 := m.Platform.GetRegisterDW0()
trig := map[uint32]string{
0b00: "LEVEL",
0b01: "EDGE_SINGLE",
@ -169,24 +148,24 @@ func (macro *Macro) Trig() *Macro {
}
level, exist := trig[dw0.GetRXLevelEdgeConfiguration()]
if !exist {
logs.Errorf("%s: RXLevelEdgeConfig error: map does not contain %d",
m.id, dw0.GetRXLevelEdgeConfiguration())
level = "ERROR"
}
return macro.Separator().Add(level)
return m.Separator().Add(level)
}
// Adds Pad Polarity Inversion Stage (RXINV) to macro string as a new argument
// return: Macro
func (macro *Macro) Invert() *Macro {
if macro.GetRegisterDW0().GetRxInvert() != 0 {
return macro.Separator().Add("INVERT")
// Invert() adds Pad Polarity Inversion Stage (RXINV) to macro string
func (m *Macro) Invert() *Macro {
if dw0 := m.Platform.GetRegisterDW0(); dw0.GetRxInvert() != 0 {
return m.Separator().Add("INVERT")
}
return macro.Separator().Add("NONE")
return m.Separator().Add("NONE")
}
// Adds input/output buffer state
// return: Macro
func (macro *Macro) Bufdis() *Macro {
dw0 := macro.GetRegisterDW0()
// Bufdis() adds input/output buffer state
func (m *Macro) Bufdis() *Macro {
dw0 := m.Platform.GetRegisterDW0()
states := map[uint32]string{
0b00: "NO_DISABLE", // both buffers are enabled
0b01: "TX_DISABLE", // output buffer is disabled
@ -195,34 +174,33 @@ func (macro *Macro) Bufdis() *Macro {
}
state, exist := states[dw0.GetGPIORxTxDisableStatus()]
if !exist {
logs.Errorf("%s: GPIORxTxDisableStatus error: map does not contain %d",
m.id, dw0.GetGPIORxTxDisableStatus())
state = "ERROR"
}
return macro.Separator().Add(state)
return m.Separator().Add(state)
}
// Adds macro to set the host software ownership
// return: Macro
func (macro *Macro) Own() *Macro {
if macro.IsOwnershipDriver() {
return macro.Separator().Add("DRIVER")
// Own() adds macro to set the host software ownership
func (m *Macro) Own() *Macro {
if m.IsOwnershipDriver() {
return m.Separator().Add("DRIVER")
}
return macro.Separator().Add("ACPI")
return m.Separator().Add("ACPI")
}
// Adds pad native function (PMODE) as a new argument
// return: Macro
func (macro *Macro) Padfn() *Macro {
dw0 := macro.GetRegisterDW0()
// Padfn() adds pad native function (PMODE)
func (m *Macro) Padfn() *Macro {
dw0 := m.Platform.GetRegisterDW0()
if number := dw0.GetPadMode(); number != 0 {
return macro.Separator().Add(fmt.Sprintf("NF%d", number))
return m.Separator().Add(fmt.Sprintf("NF%d", number))
}
// GPIO used only for PAD_FUNC(x) macro
return macro.Add("GPIO")
return m.Add("GPIO")
}
// Add a line to the macro that defines IO Standby State
// return: macro
func (macro *Macro) IOSstate() *Macro {
// IOSstate() adds a line to the macro that defines IO Standby State
func (m *Macro) IOSstate() *Macro {
states := map[uint32]string{
bits.IOStateTxLASTRxE: "TxLASTRxE",
bits.IOStateTx0RxDCRx0: "Tx0RxDCRx0",
@ -236,19 +214,19 @@ func (macro *Macro) IOSstate() *Macro {
bits.IOStateTxDRxE: "TxDRxE",
bits.IOStateStandbyIgnore: "IGNORE",
}
dw1 := macro.GetRegisterDW1()
dw1 := m.Platform.GetRegisterDW1()
state, exist := states[dw1.GetIOStandbyState()]
if !exist {
// ignore setting for incorrect value
logs.Errorf("%s: IOStandbyState error: map does not contain %d",
m.id, dw1.GetIOStandbyState())
state = "ERROR"
}
return macro.Separator().Add(state)
return m.Separator().Add(state)
}
// Add a line to the macro that defines IO Standby Termination
// return: macro
func (macro *Macro) IOTerm() *Macro {
dw1 := macro.GetRegisterDW1()
// IOTerm() add a line to the macro that defines IO Standby Termination
func (m *Macro) IOTerm() *Macro {
dw1 := m.Platform.GetRegisterDW1()
terminations := map[uint32]string{
bits.IOTermSAME: "SAME",
bits.IOTermDISPUPD: "DISPUPD",
@ -257,87 +235,94 @@ func (macro *Macro) IOTerm() *Macro {
}
termination, exist := terminations[dw1.GetIOStandbyTermination()]
if !exist {
logs.Errorf("%s: IOStandbyTermination error: map does not contain %d",
m.id, dw1.GetIOStandbyTermination())
termination = "ERROR"
}
return macro.Separator().Add(termination)
return m.Separator().Add(termination)
}
// Check created macro
func (macro *Macro) check() *Macro {
dw0 := macro.GetRegisterDW0()
func (m *Macro) Check() *Macro {
dw0 := m.Platform.GetRegisterDW0()
if !dw0.MaskCheck() {
return macro.GenerateFields()
return m.GenerateFields()
}
return macro
return m
}
// or - Set " | " if its needed
func (macro *Macro) Or() *Macro {
if str := macro.Get(); str[len(str)-1] == ')' {
macro.Add(" | ")
}
return macro
}
func (macro *Macro) DecodeIgnoredFieldsDW0() *Macro {
func (m *Macro) DecodeIgnoredFieldsDW0() *Macro {
if p2m.Config.Field == p2m.FspFlds {
return macro
logs.Infof("%s: decoding of extracted fields is not applied for fsp", m.id)
return m
} else if m.Fields == nil {
logs.Errorf("%s: field collection is not set in the macro structure", m.id)
return m
}
dw0 := macro.GetRegisterDW0()
dw0 := m.Platform.GetRegisterDW0()
if ignored := dw0.IgnoredFieldsGet(); ignored != 0 {
saved := dw0.Value
dw0.Value = ignored
macro.Add("/* DW0: ")
macro.Fields.DecodeDW0()
macro.Add(" - IGNORED */\n")
m.Add("/* DW0: ").Fields.DecodeDW0(m).Add(" - IGNORED */\n")
dw0.Value = saved
}
return macro
return m
}
func (macro *Macro) DecodeIgnoredFieldsDW1() *Macro {
func (m *Macro) DecodeIgnoredFieldsDW1() *Macro {
if p2m.Config.Field == p2m.FspFlds {
return macro
logs.Infof("%s: decoding of extracted fields is not applied for fsp", m.id)
return m
} else if m.Fields == nil {
logs.Errorf("%s: field collection is not set in the macro structure", m.id)
return m
}
dw1 := macro.GetRegisterDW1()
dw1 := m.Platform.GetRegisterDW1()
if ignored := dw1.IgnoredFieldsGet(); ignored != 0 {
saved := dw1.Value
dw1.Value = ignored
macro.Add("/* DW0: ")
macro.DecodeDW1()
macro.Add(" - IGNORED */\n")
m.Add("/* DW1: ").Fields.DecodeDW1(m).Add(" - IGNORED */\n")
dw1.Value = saved
}
return macro
return m
}
// GenerateFields - generate bitfield macros
func (macro *Macro) GenerateFields() *Macro {
dw0 := macro.GetRegisterDW0()
dw1 := macro.GetRegisterDW1()
// GenerateFields() generates bitfield macros
func (m *Macro) GenerateFields() *Macro {
if m.Fields == nil {
logs.Errorf("%s: field collection is not set in the macro structure", m.id)
return m
}
dw0 := m.Platform.GetRegisterDW0()
dw1 := m.Platform.GetRegisterDW1()
// Get mask of ignored bit fields.
dw0Ignored := dw0.IgnoredFieldsGet()
dw1Ignored := dw1.IgnoredFieldsGet()
if p2m.Config.GenLevel != 4 {
macro.Clear()
m.Clear()
}
if p2m.Config.GenLevel >= 3 {
// Add string of reference macro as a comment
reference := macro.Get()
macro.Clear()
// Add string of reference m as a comment
reference := m.line
m.Clear()
/* DW0 : PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1 - IGNORED */
macro.DecodeIgnoredFieldsDW0()
macro.DecodeIgnoredFieldsDW1()
m.DecodeIgnoredFieldsDW0()
m.DecodeIgnoredFieldsDW1()
if p2m.Config.GenLevel >= 4 {
/* PAD_CFG_NF(GPP_B23, 20K_PD, PLTRST, NF2), */
macro.Add("/* ").Add(reference).Add(" */\n")
m.Add("/* ").Add(reference).Add(" */\n")
}
}
if p2m.Config.IgnoredFields {
// Consider bit fields that should be ignored when regenerating
// advansed macros
// advansed ms
tempVal := dw0.Value & ^dw0Ignored
dw0.Value = tempVal
@ -345,76 +330,72 @@ func (macro *Macro) GenerateFields() *Macro {
dw1.Value = tempVal
}
macro.Fields.GenerateString()
return macro
return m.Fields.GenerateMacro(m)
}
// Generate macro for bi-directional GPIO port
func (macro *Macro) Bidirection() {
dw1 := macro.GetRegisterDW1()
// Bidirection() generates macro for bi-directional GPIO port
func (m *Macro) Bidirection() {
dw1 := m.Platform.GetRegisterDW1()
ios := dw1.GetIOStandbyState() != 0 || dw1.GetIOStandbyTermination() != 0
macro.Set("PAD_CFG_GPIO_BIDIRECT")
m.Set("PAD_CFG_GPIO_BIDIRECT")
if ios {
macro.Add("_IOS")
m.Add("_IOS")
}
// PAD_CFG_GPIO_BIDIRECT(pad, val, pull, rst, trig, own)
macro.Add("(").Id().Val().Pull().Rstsrc().Trig()
m.Add("(").Id().Val().Pull().Rstsrc().Trig()
if ios {
// PAD_CFG_GPIO_BIDIRECT_IOS(pad, val, pull, rst, trig, iosstate, iosterm, own)
macro.IOSstate().IOTerm()
m.IOSstate().IOTerm()
}
macro.Own().Add("),")
m.Own().Add("),")
}
// Gets base string of current macro
// return: string of macro
func (macro *Macro) Generate() string {
const rxDisable uint32 = 0x2
const txDisable uint32 = 0x1
macro.Platform.RemmapRstSrc()
macro.Set("PAD_CFG")
if dw0 := macro.GetRegisterDW0(); dw0.GetPadMode() == 0 {
// GPIO
switch dw0.GetGPIORxTxDisableStatus() {
// Generate() generates string of macro
func (m *Macro) Generate() string {
m.Platform.RemapRstSrc(m)
if dw0 := m.Platform.GetRegisterDW0(); dw0.GetPadMode() == 0 {
const txDisable uint32 = 0b01
const rxDisable uint32 = 0b10
switch m.Set("PAD_CFG"); dw0.GetGPIORxTxDisableStatus() {
case txDisable:
macro.Platform.GpiMacroAdd() // GPI
m.Platform.AddGpiMacro(m) // GPI
case rxDisable:
macro.Platform.GpoMacroAdd() // GPO
m.Platform.AddGpoMacro(m) // GPO
case rxDisable | txDisable:
macro.Platform.NoConnMacroAdd() // NC
m.Platform.AddNoConnMacro(m) // NC
default:
macro.Bidirection()
m.Bidirection()
}
} else {
macro.Platform.NativeFunctionMacroAdd()
m.Platform.AddNativeFunctionMacro(m)
}
if p2m.Config.Field != p2m.NoFlds {
// Clear control mask to generate advanced macro only
return macro.GenerateFields().Get()
// clear control mask to generate field collection macro
return m.GenerateFields().line
}
if !p2m.Config.AutoCheck {
body := macro.Get()
body := m.line
if p2m.Config.GenLevel >= 3 {
macro.Clear()
macro.DecodeIgnoredFieldsDW0()
macro.DecodeIgnoredFieldsDW1()
comment := macro.Get()
if m.Fields == nil {
logs.Errorf("%s: field collection is not set in the macro structure", m.id)
return body
}
m.Clear()
m.DecodeIgnoredFieldsDW0()
m.DecodeIgnoredFieldsDW1()
comment := m.line
if p2m.Config.GenLevel >= 4 {
macro.Clear().Add("/* ")
macro.Fields.GenerateString()
macro.Add(" */\n")
comment += macro.Get()
comment += m.Clear().Add("/* ").Fields.GenerateMacro(m).Add(" */\n").line
}
return comment + body
}
return body
}
return macro.check().Get()
return m.Check().line
}

5
util/intelp2m/platforms/common/register/helper.go Normal file
View file

@ -0,0 +1,5 @@
package register
func SetVal[T DW0 | DW1](value uint32, ro uint32) T {
return T{Register: Register{Value: value, ReadOnly: ro}}
}

41
util/intelp2m/platforms/ebg/ebg_test.go
View file

@ -3,108 +3,103 @@ package ebg_test
import (
"testing"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/cnl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/ebg"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/snr"
"review.coreboot.org/coreboot.git/util/intelp2m/config/p2m"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/test"
)
func TestGenMacro(t *testing.T) {
emmitsburg := ebg.PlatformSpecific{
InheritanceMacro: cnl.PlatformSpecific{
InheritanceMacro: snr.PlatformSpecific{},
},
}
p2m.Config.Platform = p2m.Emmitsburg
test.Suite{
{
Pad: test.Pad{ID: "GPPC_A1", DW0: 0x11111111, DW1: 0x11111111, Ownership: 1},
Pad: test.Pad{ID: "GPPC_A1", DW0: 0x11111111, DW1: 0x11111111, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPPC_A1, DN_20K, RSMRST, NF4),",
Long: "_PAD_CFG_STRUCT(GPPC_A1, PAD_FUNC(NF4) | PAD_RESET(RSMRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE) | (1 << 28) | 1, PAD_PULL(DN_20K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(DISPUPD) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPPC_B2", DW0: 0x22222222, DW1: 0x22222222, Ownership: 0},
Pad: test.Pad{ID: "GPPC_B2", DW0: 0x22222222, DW1: 0x22222222, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_TERM_GPO(GPPC_B2, 0, INVALID, RSMRST),",
Long: "_PAD_CFG_STRUCT(GPPC_B2, PAD_FUNC(GPIO) | PAD_RESET(RSMRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(RX_DISABLE) | (1 << 29) | (1 << 1), PAD_CFG1_TOL_1V8PAD_PULL(INVALID) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(ENPD)),",
},
},
{
Pad: test.Pad{ID: "GPPC_C3", DW0: 0x44444444, DW1: 0x44444444, Ownership: 1},
Pad: test.Pad{ID: "GPPC_C3", DW0: 0x44444444, DW1: 0x44444444, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPPC_C3, INVALID, DEEP, NF1),",
Long: "_PAD_CFG_STRUCT(GPPC_C3, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_IRQ_ROUTE(SMI), PAD_PULL(INVALID) | PAD_IOSSTATE(Tx0RxDCRx0) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_D4", DW0: 0x88888888, DW1: 0x88888888, Ownership: 0},
Pad: test.Pad{ID: "GPP_D4", DW0: 0x88888888, DW1: 0x88888888, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_D4, DN_5K, PLTRST, NF2),",
Long: "_PAD_CFG_STRUCT(GPP_D4, PAD_FUNC(NF2) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT), PAD_PULL(DN_5K) | PAD_IOSSTATE(Tx0RxDCRx1)),",
},
},
}.Run(t, "INTEL-EMMITSBURG-LAKE-PCH/SLIDING-ONE-IN-NIBBLE-TEST", emmitsburg)
}.Run(t, "INTEL-EMMITSBURG-LAKE-PCH/SLIDING-ONE-IN-NIBBLE-TEST")
test.Suite{
{
Pad: test.Pad{ID: "GPP_E5", DW0: 0xEEEEEEEE, DW1: 0xEEEEEEEE, Ownership: 1},
Pad: test.Pad{ID: "GPP_E5", DW0: 0xEEEEEEEE, DW1: 0xEEEEEEEE, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_E5, UP_2K, RSMRST, NF3),",
Long: "_PAD_CFG_STRUCT(GPP_E5, PAD_FUNC(NF3) | PAD_RESET(RSMRST) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_RX_POL(INVERT) | PAD_BUF(RX_DISABLE) | (1 << 29) | (1 << 1), PAD_CFG1_TOL_1V8PAD_PULL(UP_2K) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPD) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPPC_H6", DW0: 0xDDDDDDDD, DW1: 0xDDDDDDDD, Ownership: 0},
Pad: test.Pad{ID: "GPPC_H6", DW0: 0xDDDDDDDD, DW1: 0xDDDDDDDD, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPPC_H6, INVALID, RSMRST, NF7),",
Long: "_PAD_CFG_STRUCT(GPPC_H6, PAD_FUNC(NF7) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 28) | 1, PAD_PULL(INVALID) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(DISPUPD)),",
},
},
{
Pad: test.Pad{ID: "GPP_J7", DW0: 0xBBBBBBBB, DW1: 0xBBBBBBBB, Ownership: 1},
Pad: test.Pad{ID: "GPP_J7", DW0: 0xBBBBBBBB, DW1: 0xBBBBBBBB, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_J7, INVALID, PLTRST, NF6),",
Long: "_PAD_CFG_STRUCT(GPP_J7, PAD_FUNC(NF6) | PAD_RESET(PLTRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(NMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(INVALID) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPU) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_I8", DW0: 0x77777777, DW1: 0x77777777, Ownership: 0},
Pad: test.Pad{ID: "GPP_I8", DW0: 0x77777777, DW1: 0x77777777, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_I8, UP_667, DEEP, NF5),",
Long: "_PAD_CFG_STRUCT(GPP_I8, PAD_FUNC(NF5) | PAD_RESET(DEEP) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(UP_667) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPU)),",
},
},
}.Run(t, "INTEL-EMMITSBURG-PCH/SLIDING-ZERO-IN-NIBBLE-TEST", emmitsburg)
}.Run(t, "INTEL-EMMITSBURG-PCH/SLIDING-ZERO-IN-NIBBLE-TEST")
test.Suite{
{
Pad: test.Pad{ID: "GPP_L9", DW0: 0x33333333, DW1: 0x33333333, Ownership: 1},
Pad: test.Pad{ID: "GPP_L9", DW0: 0x33333333, DW1: 0x33333333, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_L9, UP_20K, RSMRST, NF4),",
Long: "_PAD_CFG_STRUCT(GPP_L9, PAD_FUNC(NF4) | PAD_RESET(RSMRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(UP_20K) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPU) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_M10", DW0: 0x66666666, DW1: 0x66666666, Ownership: 0},
Pad: test.Pad{ID: "GPP_M10", DW0: 0x66666666, DW1: 0x66666666, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_M10, UP_1K, DEEP, NF1),",
Long: "_PAD_CFG_STRUCT(GPP_M10, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(RX_DISABLE) | (1 << 29) | (1 << 1), PAD_CFG1_TOL_1V8PAD_PULL(UP_1K) | PAD_IOSSTATE(TxDRxE) | PAD_IOSTERM(ENPD)),",
},
},
{
Pad: test.Pad{ID: "GPP_N11", DW0: 0xCCCCCCCC, DW1: 0xCCCCCCCC, Ownership: 1},
Pad: test.Pad{ID: "GPP_N11", DW0: 0xCCCCCCCC, DW1: 0xCCCCCCCC, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_N11, INVALID, RSMRST, NF3),",
Long: "_PAD_CFG_STRUCT(GPP_N11, PAD_FUNC(NF3) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_RX_POL(INVERT), PAD_PULL(INVALID) | PAD_IOSSTATE(Tx1RxDCRx0) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPPC_A12", DW0: 0x99999999, DW1: 0x99999999, Ownership: 0},
Pad: test.Pad{ID: "GPPC_A12", DW0: 0x99999999, DW1: 0x99999999, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPPC_A12, INVALID, PLTRST, NF6),",
Long: "_PAD_CFG_STRUCT(GPPC_A12, PAD_FUNC(NF6) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 28) | 1, PAD_PULL(INVALID) | PAD_IOSSTATE(Tx1RxE) | PAD_IOSTERM(DISPUPD)),",
},
},
}.Run(t, "INTEL-EMMITSBURG-LAKE-PCH/SLIDING-ONE-ONE-IN-NIBBLE-TEST", emmitsburg)
}.Run(t, "INTEL-EMMITSBURG-LAKE-PCH/SLIDING-ONE-ONE-IN-NIBBLE-TEST")
}

108
util/intelp2m/platforms/ebg/macro.go
View file

@ -1,105 +1,47 @@
package ebg
import (
"fmt"
"review.coreboot.org/coreboot.git/util/intelp2m/fields"
"review.coreboot.org/coreboot.git/util/intelp2m/logs"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/cnl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common/register/bits"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/snr"
)
const (
PAD_CFG_DW0_RO_FIELDS = (0x1 << 27) | (0x1 << 24) | (0x3 << 21) | (0xf << 16) | 0xfc
PAD_CFG_DW1_RO_FIELDS = 0xfdffc3ff
DW0Mask = (0b1 << 27) | (0b1 << 24) | (0b11 << 21) | (0b1111 << 16) | 0b11111100
DW1Mask = 0b11111101111111111100001111111111
)
type InheritanceMacro interface {
Pull()
GpiMacroAdd()
GpoMacroAdd()
NativeFunctionMacroAdd()
NoConnMacroAdd()
type BasePlatform struct {
// based on the Cannon Lake platform
cnl.BasePlatform
}
type PlatformSpecific struct {
InheritanceMacro
func InitBasePlatform(dw0, dw0mask uint32, dw1, dw1mask uint32) BasePlatform {
return BasePlatform{cnl.InitBasePlatform(dw0, dw0mask, dw1, dw1mask)}
}
// RemmapRstSrc - remmap Pad Reset Source Config
func (PlatformSpecific) RemmapRstSrc() {
macro := common.GetMacro()
dw0 := macro.GetRegisterDW0()
var remapping = map[uint32]uint32{
0: bits.RstCfgRSMRST << bits.DW0PadRstCfg,
1: bits.RstCfgDEEP << bits.DW0PadRstCfg,
2: bits.RstCfgPLTRST << bits.DW0PadRstCfg,
func GetPlatform(dw0, dw1 uint32) common.PlatformIf {
p := InitBasePlatform(dw0, DW0Mask, dw1, DW1Mask)
return &p
}
// Override BasePlatform.RemapRstSrc()
func (p *BasePlatform) RemapRstSrc(m *common.Macro) {
remapping := map[uint32]uint32{
0b00: bits.RstCfgRSMRST << bits.DW0PadRstCfg,
0b01: bits.RstCfgDEEP << bits.DW0PadRstCfg,
0b10: bits.RstCfgPLTRST << bits.DW0PadRstCfg,
}
resetsrc, valid := remapping[dw0.GetResetConfig()]
dw0 := p.GetRegisterDW0()
source, valid := remapping[dw0.GetResetConfig()]
if valid {
// dw0.SetResetConfig(resetsrc)
ResetConfigFieldVal := (dw0.Value & 0x3fffffff) | remapping[dw0.GetResetConfig()]
dw0.Value = ResetConfigFieldVal
dw0.Value &= 0x3fffffff
dw0.Value |= source
} else {
fmt.Println("Invalid Pad Reset Config [ 0x", resetsrc, " ] for ", macro.PadIdGet())
logs.Errorf("%s: skip re-mapping: DW0 %s: invalid reset config source value 0b%b",
m.GetPadId(), dw0, dw0.GetResetConfig())
}
mask := bits.DW0[bits.DW0PadRstCfg]
dw0.CntrMaskFieldsClear(mask)
}
// Adds The Pad Termination (TERM) parameter from PAD_CFG_DW1 to the macro
// as a new argument
func (platform PlatformSpecific) Pull() {
platform.InheritanceMacro.Pull()
}
// Adds PAD_CFG_GPI macro with arguments
func (platform PlatformSpecific) GpiMacroAdd() {
platform.InheritanceMacro.GpiMacroAdd()
}
// Adds PAD_CFG_GPO macro with arguments
func (platform PlatformSpecific) GpoMacroAdd() {
platform.InheritanceMacro.GpoMacroAdd()
}
// Adds PAD_CFG_NF macro with arguments
func (platform PlatformSpecific) NativeFunctionMacroAdd() {
platform.InheritanceMacro.NativeFunctionMacroAdd()
}
// Adds PAD_NC macro
func (platform PlatformSpecific) NoConnMacroAdd() {
platform.InheritanceMacro.NoConnMacroAdd()
}
// GenMacro - generate pad macro
// dw0 : DW0 config register value
// dw1 : DW1 config register value
// return: string of macro
func (platform PlatformSpecific) GenMacro(id string, dw0Val, dw1Val uint32, ownership uint8) string {
macro := common.GetInstanceMacro(
PlatformSpecific{
InheritanceMacro: cnl.PlatformSpecific{
InheritanceMacro: snr.PlatformSpecific{},
},
},
fields.InterfaceGet(),
)
macro.Clear()
dw0 := macro.GetRegisterDW0()
dw0.CntrMaskFieldsClear(bits.All32)
dw1 := macro.GetRegisterDW1()
dw1.CntrMaskFieldsClear(bits.All32)
dw0.Value = dw0Val
dw1.Value = dw1Val
dw0.ReadOnly = PAD_CFG_DW0_RO_FIELDS
dw1.ReadOnly = PAD_CFG_DW1_RO_FIELDS
macro.PadIdSet(id).SetPadOwnership(ownership)
return macro.Generate()
}

4
util/intelp2m/platforms/ebg/template.go
View file

@ -5,10 +5,10 @@ import "review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
// Group : "GPPC_A", "GPPC_B", "GPPC_S", "GPPC_C", "GPP_D", "GPP_E", "GPPC_H", "GPP_J",
// "GPP_I", "GPP_L", "GPP_M", "GPP_N"
// KeywordCheck - This function is used to filter parsed lines of the configuration file and
// CheckKeyword - This function is used to filter parsed lines of the configuration file and
// returns true if the keyword is contained in the line.
// line : string from the configuration file
func (platform PlatformSpecific) KeywordCheck(line string) bool {
func CheckKeyword(line string) bool {
isIncluded, _ := common.KeywordsCheck(line, "GPP_", "GPPC_")
return isIncluded
}

38
util/intelp2m/platforms/interfaces.go
View file

@ -1,38 +0,0 @@
package platforms
import (
"review.coreboot.org/coreboot.git/util/intelp2m/config/p2m"
"review.coreboot.org/coreboot.git/util/intelp2m/logs"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/adl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/apl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/cnl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/lbg"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/snr"
)
type SpecificIf interface {
GenMacro(id string, dw0 uint32, dw1 uint32, ownership uint8) string
KeywordCheck(line string) bool
}
func GetSpecificInterface() SpecificIf {
platforms := map[p2m.PlatformType]SpecificIf{
p2m.Alder: adl.PlatformSpecific{},
p2m.Apollo: apl.PlatformSpecific{},
p2m.Sunrise: snr.PlatformSpecific{},
p2m.Cannon: cnl.PlatformSpecific{
InheritanceTemplate: snr.PlatformSpecific{},
InheritanceMacro: snr.PlatformSpecific{},
},
p2m.Lewisburg: lbg.PlatformSpecific{
InheritanceTemplate: snr.PlatformSpecific{},
InheritanceMacro: snr.PlatformSpecific{},
},
}
platform, exist := platforms[p2m.Config.Platform]
if !exist {
logs.Errorf("unknown platform type %d", int(p2m.Config.Platform))
return nil
}
return platform
}

41
util/intelp2m/platforms/jsl/jsl_test.go
View file

@ -3,108 +3,103 @@ package jsl_test
import (
"testing"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/cnl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/jsl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/snr"
"review.coreboot.org/coreboot.git/util/intelp2m/config/p2m"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/test"
)
func TestGenMacro(t *testing.T) {
jasperlake := jsl.PlatformSpecific{
InheritanceMacro: cnl.PlatformSpecific{
InheritanceMacro: snr.PlatformSpecific{},
},
}
p2m.Config.Platform = p2m.Jasper
test.Suite{
{
Pad: test.Pad{ID: "GPP_A1", DW0: 0x11111111, DW1: 0x11111111, Ownership: 1},
Pad: test.Pad{ID: "GPP_A1", DW0: 0x11111111, DW1: 0x11111111, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_A1, DN_20K, PWROK, NF4),",
Long: "_PAD_CFG_STRUCT(GPP_A1, PAD_FUNC(NF4) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE) | (1 << 28) | 1, PAD_PULL(DN_20K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(DISPUPD) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_B2", DW0: 0x22222222, DW1: 0x22222222, Ownership: 0},
Pad: test.Pad{ID: "GPP_B2", DW0: 0x22222222, DW1: 0x22222222, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_TERM_GPO(GPP_B2, 0, INVALID, PWROK),",
Long: "_PAD_CFG_STRUCT(GPP_B2, PAD_FUNC(GPIO) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(RX_DISABLE) | (1 << 29) | (1 << 1), PAD_CFG1_TOL_1V8PAD_PULL(INVALID) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(ENPD)),",
},
},
{
Pad: test.Pad{ID: "GPP_C3", DW0: 0x44444444, DW1: 0x44444444, Ownership: 1},
Pad: test.Pad{ID: "GPP_C3", DW0: 0x44444444, DW1: 0x44444444, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_C3, INVALID, DEEP, NF1),",
Long: "_PAD_CFG_STRUCT(GPP_C3, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_IRQ_ROUTE(SMI), PAD_PULL(INVALID) | PAD_IOSSTATE(Tx0RxDCRx0) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_D4", DW0: 0x88888888, DW1: 0x88888888, Ownership: 0},
Pad: test.Pad{ID: "GPP_D4", DW0: 0x88888888, DW1: 0x88888888, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_D4, DN_5K, PLTRST, NF2),",
Long: "_PAD_CFG_STRUCT(GPP_D4, PAD_FUNC(NF2) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT), PAD_PULL(DN_5K) | PAD_IOSSTATE(Tx0RxDCRx1)),",
},
},
}.Run(t, "INTEL-JASPER-LAKE-PCH/SLIDING-ONE-IN-NIBBLE-TEST", jasperlake)
}.Run(t, "INTEL-JASPER-LAKE-PCH/SLIDING-ONE-IN-NIBBLE-TEST")
test.Suite{
{
Pad: test.Pad{ID: "GPP_E5", DW0: 0xEEEEEEEE, DW1: 0xEEEEEEEE, Ownership: 1},
Pad: test.Pad{ID: "GPP_E5", DW0: 0xEEEEEEEE, DW1: 0xEEEEEEEE, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_E5, UP_2K, RSMRST, NF3),",
Long: "_PAD_CFG_STRUCT(GPP_E5, PAD_FUNC(NF3) | PAD_RESET(RSMRST) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_RX_POL(INVERT) | PAD_BUF(RX_DISABLE) | (1 << 29) | (1 << 1), PAD_CFG1_TOL_1V8PAD_PULL(UP_2K) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPD) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_F6", DW0: 0xDDDDDDDD, DW1: 0xDDDDDDDD, Ownership: 0},
Pad: test.Pad{ID: "GPP_F6", DW0: 0xDDDDDDDD, DW1: 0xDDDDDDDD, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_F6, INVALID, RSMRST, NF7),",
Long: "_PAD_CFG_STRUCT(GPP_F6, PAD_FUNC(NF7) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 28) | 1, PAD_PULL(INVALID) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(DISPUPD)),",
},
},
{
Pad: test.Pad{ID: "GPP_G7", DW0: 0xBBBBBBBB, DW1: 0xBBBBBBBB, Ownership: 1},
Pad: test.Pad{ID: "GPP_G7", DW0: 0xBBBBBBBB, DW1: 0xBBBBBBBB, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_G7, INVALID, PLTRST, NF6),",
Long: "_PAD_CFG_STRUCT(GPP_G7, PAD_FUNC(NF6) | PAD_RESET(PLTRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(NMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(INVALID) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPU) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_H8", DW0: 0x77777777, DW1: 0x77777777, Ownership: 0},
Pad: test.Pad{ID: "GPP_H8", DW0: 0x77777777, DW1: 0x77777777, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_H8, UP_667, DEEP, NF5),",
Long: "_PAD_CFG_STRUCT(GPP_H8, PAD_FUNC(NF5) | PAD_RESET(DEEP) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(UP_667) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPU)),",
},
},
}.Run(t, "INTEL-JASPER-LAKE-PCH/SLIDING-ZERO-IN-NIBBLE-TEST", jasperlake)
}.Run(t, "INTEL-JASPER-LAKE-PCH/SLIDING-ZERO-IN-NIBBLE-TEST")
test.Suite{
{
Pad: test.Pad{ID: "GPP_R9", DW0: 0x33333333, DW1: 0x33333333, Ownership: 1},
Pad: test.Pad{ID: "GPP_R9", DW0: 0x33333333, DW1: 0x33333333, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_R9, UP_20K, PWROK, NF4),",
Long: "_PAD_CFG_STRUCT(GPP_R9, PAD_FUNC(NF4) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(UP_20K) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPU) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_S10", DW0: 0x66666666, DW1: 0x66666666, Ownership: 0},
Pad: test.Pad{ID: "GPP_S10", DW0: 0x66666666, DW1: 0x66666666, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_S10, UP_1K, DEEP, NF1),",
Long: "_PAD_CFG_STRUCT(GPP_S10, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(RX_DISABLE) | (1 << 29) | (1 << 1), PAD_CFG1_TOL_1V8PAD_PULL(UP_1K) | PAD_IOSSTATE(TxDRxE) | PAD_IOSTERM(ENPD)),",
},
},
{
Pad: test.Pad{ID: "GPP_T11", DW0: 0xCCCCCCCC, DW1: 0xCCCCCCCC, Ownership: 1},
Pad: test.Pad{ID: "GPP_T11", DW0: 0xCCCCCCCC, DW1: 0xCCCCCCCC, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_T11, INVALID, RSMRST, NF3),",
Long: "_PAD_CFG_STRUCT(GPP_T11, PAD_FUNC(NF3) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_RX_POL(INVERT), PAD_PULL(INVALID) | PAD_IOSSTATE(Tx1RxDCRx0) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPD12", DW0: 0x99999999, DW1: 0x99999999, Ownership: 0},
Pad: test.Pad{ID: "GPD12", DW0: 0x99999999, DW1: 0x99999999, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPD12, INVALID, PLTRST, NF6),",
Long: "_PAD_CFG_STRUCT(GPD12, PAD_FUNC(NF6) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 28) | 1, PAD_PULL(INVALID) | PAD_IOSSTATE(Tx1RxE) | PAD_IOSTERM(DISPUPD)),",
},
},
}.Run(t, "INTEL-JASPER-LAKE-PCH/SLIDING-ONE-ONE-IN-NIBBLE-TEST", jasperlake)
}.Run(t, "INTEL-JASPER-LAKE-PCH/SLIDING-ONE-ONE-IN-NIBBLE-TEST")
}

118
util/intelp2m/platforms/jsl/macro.go
View file

@ -1,118 +1,60 @@
package jsl
import (
"fmt"
"strings"
"review.coreboot.org/coreboot.git/util/intelp2m/fields"
"review.coreboot.org/coreboot.git/util/intelp2m/logs"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/cnl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common/register/bits"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/snr"
)
const (
PAD_CFG_DW0_RO_FIELDS = (0x1 << 27) | (0x1 << 18) | (0x3f << 11) | (0x3f << 2) | (0x1 << 1)
PAD_CFG_DW1_RO_FIELDS = 0xdfffc3ff
DW0Mask = (0b1 << 27) | (0b1 << 18) | (0b00111111 << 11) | (0b00111111 << 2) | (0b1 << 1)
DW1Mask = 0b11111101111111111100001111111111
)
type InheritanceMacro interface {
Pull()
GpiMacroAdd()
GpoMacroAdd()
NativeFunctionMacroAdd()
NoConnMacroAdd()
type BasePlatform struct {
// based on the Cannon Lake platform
cnl.BasePlatform
}
type PlatformSpecific struct {
InheritanceMacro
func InitBasePlatform(dw0, dw0mask uint32, dw1, dw1mask uint32) BasePlatform {
return BasePlatform{cnl.InitBasePlatform(dw0, dw0mask, dw1, dw1mask)}
}
// RemmapRstSrc - remmap Pad Reset Source Config
func (PlatformSpecific) RemmapRstSrc() {
macro := common.GetMacro()
if strings.Contains(macro.PadIdGet(), "GPP_F") ||
strings.Contains(macro.PadIdGet(), "GPP_B") ||
strings.Contains(macro.PadIdGet(), "GPP_A") ||
strings.Contains(macro.PadIdGet(), "GPP_S") ||
strings.Contains(macro.PadIdGet(), "GPP_R") {
func GetPlatform(dw0, dw1 uint32) common.PlatformIf {
p := InitBasePlatform(dw0, DW0Mask, dw1, DW1Mask)
return &p
}
// Override the base platform method
func (p *BasePlatform) RemapRstSrc(m *common.Macro) {
if strings.Contains(m.GetPadId(), "GPP_F") ||
strings.Contains(m.GetPadId(), "GPP_B") ||
strings.Contains(m.GetPadId(), "GPP_A") ||
strings.Contains(m.GetPadId(), "GPP_S") ||
strings.Contains(m.GetPadId(), "GPP_R") {
// See reset map for the Jasper Lake Community 0:
// https://github.com/coreboot/coreboot/blob/master/src/soc/intel/jasperlake/gpio.c#L21
// remmap is not required because it is the same as common.
return
}
dw0 := macro.GetRegisterDW0()
var remapping = map[uint32]uint32{
0: bits.RstCfgRSMRST << bits.DW0PadRstCfg,
1: bits.RstCfgDEEP << bits.DW0PadRstCfg,
2: bits.RstCfgPLTRST << bits.DW0PadRstCfg,
remapping := map[uint32]uint32{
0b00: bits.RstCfgRSMRST << bits.DW0PadRstCfg,
0b01: bits.RstCfgDEEP << bits.DW0PadRstCfg,
0b10: bits.RstCfgPLTRST << bits.DW0PadRstCfg,
}
resetsrc, valid := remapping[dw0.GetResetConfig()]
dw0 := p.GetRegisterDW0()
source, valid := remapping[dw0.GetResetConfig()]
if valid {
// dw0.SetResetConfig(resetsrc)
ResetConfigFieldVal := (dw0.Value & 0x3fffffff) | remapping[dw0.GetResetConfig()]
dw0.Value = ResetConfigFieldVal
dw0.Value &= 0x3fffffff
dw0.Value |= source
} else {
fmt.Println("Invalid Pad Reset Config [ 0x", resetsrc, " ] for ", macro.PadIdGet())
logs.Errorf("%s: skip re-mapping: DW0 %s: invalid reset config source value 0b%b",
m.GetPadId(), dw0, dw0.GetResetConfig())
}
mask := bits.DW0[bits.DW0PadRstCfg]
dw0.CntrMaskFieldsClear(mask)
}
// Adds The Pad Termination (TERM) parameter from PAD_CFG_DW1 to the macro
// as a new argument
func (platform PlatformSpecific) Pull() {
platform.InheritanceMacro.Pull()
}
// Adds PAD_CFG_GPI macro with arguments
func (platform PlatformSpecific) GpiMacroAdd() {
platform.InheritanceMacro.GpiMacroAdd()
}
// Adds PAD_CFG_GPO macro with arguments
func (platform PlatformSpecific) GpoMacroAdd() {
platform.InheritanceMacro.GpoMacroAdd()
}
// Adds PAD_CFG_NF macro with arguments
func (platform PlatformSpecific) NativeFunctionMacroAdd() {
platform.InheritanceMacro.NativeFunctionMacroAdd()
}
// Adds PAD_NC macro
func (platform PlatformSpecific) NoConnMacroAdd() {
platform.InheritanceMacro.NoConnMacroAdd()
}
// GenMacro - generate pad macro
// dw0 : DW0 config register value
// dw1 : DW1 config register value
// return: string of macro
func (PlatformSpecific) GenMacro(id string, dw0Val, dw1Val uint32, ownership uint8) string {
macro := common.GetInstanceMacro(
PlatformSpecific{
InheritanceMacro: cnl.PlatformSpecific{
InheritanceMacro: snr.PlatformSpecific{},
},
},
fields.InterfaceGet(),
)
macro.Clear()
macro.Clear()
dw0 := macro.GetRegisterDW0()
dw0.CntrMaskFieldsClear(bits.All32)
dw1 := macro.GetRegisterDW1()
dw1.CntrMaskFieldsClear(bits.All32)
dw0.Value = dw0Val
dw1.Value = dw1Val
dw0.ReadOnly = PAD_CFG_DW0_RO_FIELDS
dw1.ReadOnly = PAD_CFG_DW1_RO_FIELDS
macro.PadIdSet(id).SetPadOwnership(ownership)
return macro.Generate()
}

4
util/intelp2m/platforms/jsl/template.go
View file

@ -5,10 +5,10 @@ import "review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
// Group : "GPP_A", "GPP_B", "GPP_C", "GPP_D", "GPP_E", "GPP_F", "GPP_G", "GPP_H", "GPP_R",
// "GPP_S", "GPP_T", "GPD", "HVMOS", "VGPIO5"
// KeywordCheck - This function is used to filter parsed lines of the configuration file and
// CheckKeyword - This function is used to filter parsed lines of the configuration file and
// returns true if the keyword is contained in the line.
// line : string from the configuration file
func (PlatformSpecific) KeywordCheck(line string) bool {
func CheckKeyword(line string) bool {
isIncluded, _ := common.KeywordsCheck(line, "GPP_", "GPD", "VGPIO")
return isIncluded
}

56
util/intelp2m/platforms/lbg/lbg_test.go
View file

@ -3,173 +3,173 @@ package lbg_test
import (
"testing"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/lbg"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/snr"
"review.coreboot.org/coreboot.git/util/intelp2m/config/p2m"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/test"
)
func TestGenMacro(t *testing.T) {
lewisburg := lbg.PlatformSpecific{InheritanceMacro: snr.PlatformSpecific{}}
p2m.Config.Platform = p2m.Lewisburg
test.Suite{
{ /* GPP_A1 - ESPI_ALERT1# */
Pad: test.Pad{ID: "GPP_A1", DW0: 0x44000c00, DW1: 0x00003000, Ownership: 1},
Pad: test.Pad{ID: "GPP_A1", DW0: 0x44000c00, DW1: 0x00003000, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF3),",
Long: "_PAD_CFG_STRUCT(GPP_A1, PAD_FUNC(NF3) | PAD_RESET(DEEP) | PAD_TRIG(OFF), PAD_PULL(UP_20K) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{ /* GPP_A12 - LFRAME# */
Pad: test.Pad{ID: "GPP_A12", DW0: 0x80880102, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_A12", DW0: 0x80880102, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPI_SCI(GPP_A12, NONE, PLTRST, LEVEL, INVERT),",
Long: "_PAD_CFG_STRUCT(GPP_A12, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
},
},
{ /* GPP_A16 - GPIO */
Pad: test.Pad{ID: "GPP_A16", DW0: 0x44000201, DW1: 0x00000000, Ownership: 1},
Pad: test.Pad{ID: "GPP_A16", DW0: 0x44000201, DW1: 0x00000000, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_GPO_GPIO_DRIVER(GPP_A16, 1, DEEP, NONE),",
Long: "_PAD_CFG_STRUCT(GPP_A16, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{ /* GPP_A20 - GPIO */
Pad: test.Pad{ID: "GPP_A20", DW0: 0x04000100, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_A20", DW0: 0x04000100, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPI_TRIG_OWN(GPP_A20, NONE, RSMRST, OFF, ACPI),",
Long: "_PAD_CFG_STRUCT(GPP_A20, PAD_FUNC(GPIO) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),",
},
},
{ /* GPP_B10 - GPIO */
Pad: test.Pad{ID: "GPP_B10", DW0: 0x04000102, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_B10", DW0: 0x04000102, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPI_TRIG_OWN(GPP_B10, NONE, RSMRST, OFF, ACPI),",
Long: "_PAD_CFG_STRUCT(GPP_B10, PAD_FUNC(GPIO) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
},
},
{ /* GPP_B20 - GPIO */
Pad: test.Pad{ID: "GPP_B20", DW0: 0x04000200, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_B20", DW0: 0x04000200, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPO(GPP_B20, 0, RSMRST),",
Long: "_PAD_CFG_STRUCT(GPP_B20, PAD_FUNC(GPIO) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), 0),",
},
},
{ /* GPP_B23 - PCHHOT# */
Pad: test.Pad{ID: "GPP_B23", DW0: 0x04000a00, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_B23", DW0: 0x04000a00, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_B23, NONE, RSMRST, NF2),",
Long: "_PAD_CFG_STRUCT(GPP_B23, PAD_FUNC(NF2) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), 0),",
},
},
{ /* GPP_F0 - SATAXPCIE3 */
Pad: test.Pad{ID: "GPP_F0", DW0: 0x04000502, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_F0", DW0: 0x04000502, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_F0, NONE, RSMRST, NF1),",
Long: "_PAD_CFG_STRUCT(GPP_F0, PAD_FUNC(NF1) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
},
},
{ /* GPP_C10 - GPIO */
Pad: test.Pad{ID: "GPP_C10", DW0: 0x04000000, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_C10", DW0: 0x04000000, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPIO_BIDIRECT(GPP_C10, 0, NONE, RSMRST, OFF, ACPI),",
Long: "_PAD_CFG_STRUCT(GPP_C10, PAD_FUNC(GPIO) | PAD_RESET(RSMRST) | PAD_TRIG(OFF), 0),",
},
},
{ /* GPP_C23 - GPIO */
Pad: test.Pad{ID: "GPP_C23", DW0: 0x40880102, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_C23", DW0: 0x40880102, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPI_SCI(GPP_C23, NONE, DEEP, LEVEL, INVERT),",
Long: "_PAD_CFG_STRUCT(GPP_C23, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
},
},
{ /* GPP_D1 - GPIO */
Pad: test.Pad{ID: "GPP_D1", DW0: 0x04000200, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_D1", DW0: 0x04000200, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPO(GPP_D1, 0, RSMRST),",
Long: "_PAD_CFG_STRUCT(GPP_D1, PAD_FUNC(GPIO) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), 0),",
},
},
{ /* GPP_D16 - GPIO */
Pad: test.Pad{ID: "GPP_D16", DW0: 0x84000100, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_D16", DW0: 0x84000100, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPI_TRIG_OWN(GPP_D16, NONE, PLTRST, OFF, ACPI),",
Long: "_PAD_CFG_STRUCT(GPP_D16, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),",
},
},
{ /* GPP_E0 - SATAXPCIE0 */
Pad: test.Pad{ID: "GPP_E0", DW0: 0x04000502, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_E0", DW0: 0x04000502, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_E0, NONE, RSMRST, NF1),",
Long: "_PAD_CFG_STRUCT(GPP_E0, PAD_FUNC(NF1) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
},
},
{ /* GPP_E7 - GPIO */
Pad: test.Pad{ID: "GPP_E7", DW0: 0x40840102, DW1: 0x00000000, Ownership: 1},
Pad: test.Pad{ID: "GPP_E7", DW0: 0x40840102, DW1: 0x00000000, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_GPI_SMI(GPP_E7, NONE, DEEP, LEVEL, INVERT),",
Long: "_PAD_CFG_STRUCT(GPP_E7, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{ /* GPP_F2 - GPIO */
Pad: test.Pad{ID: "GPP_F2", DW0: 0x44000300, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_F2", DW0: 0x44000300, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_NC(GPP_F2, NONE),",
Long: "_PAD_CFG_STRUCT(GPP_F2, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),",
},
},
{ /* GPP_F12 - GPIO */
Pad: test.Pad{ID: "GPP_F12", DW0: 0x80900102, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_F12", DW0: 0x80900102, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPI_APIC_LOW(GPP_F12, NONE, PLTRST),",
Long: "_PAD_CFG_STRUCT(GPP_F12, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
},
},
{ /* GPP_F13 - GPIO */
Pad: test.Pad{ID: "GPP_F13", DW0: 0x80100102, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_F13", DW0: 0x80100102, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPI_APIC_HIGH(GPP_F13, NONE, PLTRST),",
Long: "_PAD_CFG_STRUCT(GPP_F13, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
},
},
{ /* GPP_H10 - NC */
Pad: test.Pad{ID: "GPP_H10", DW0: 0x44000300, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_H10", DW0: 0x44000300, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_NC(GPP_H10, NONE),",
Long: "_PAD_CFG_STRUCT(GPP_H10, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),",
},
},
{ /* GPP_L1 - CSME_INTR_OUT */
Pad: test.Pad{ID: "GPP_L1", DW0: 0x44000700, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_L1", DW0: 0x44000700, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_L1, NONE, DEEP, NF1),",
Long: "_PAD_CFG_STRUCT(GPP_L1, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),",
},
},
{ /* GPP_L19 - TESTCH1_CLK */
Pad: test.Pad{ID: "GPP_L19", DW0: 0x04000600, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_L19", DW0: 0x04000600, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_L19, NONE, RSMRST, NF1),",
Long: "_PAD_CFG_STRUCT(GPP_L19, PAD_FUNC(NF1) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), 0),",
},
},
}.Run(t, "INTEL-LEWISBURG-PCH/PAD-MAP", lewisburg)
}.Run(t, "INTEL-LEWISBURG-PCH/PAD-MAP")
test.Suite{
{
Pad: test.Pad{ID: "GPP_Axx", DW0: 0xBFFFFFFF, DW1: 0xFFFFFFFF, Ownership: 1},
Pad: test.Pad{ID: "GPP_Axx", DW0: 0xBFFFFFFF, DW1: 0xFFFFFFFF, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_Axx, NATIVE, PLTRST, NF7),",
Long: "_PAD_CFG_STRUCT(GPP_Axx, PAD_FUNC(NF7) | PAD_RESET(PLTRST) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(NATIVE) | PAD_IOSSTATE(IGNORE) | PAD_IOSTERM(ENPU) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
}.Run(t, "INTEL-LEWISBURG-PCH/MASK", lewisburg)
}.Run(t, "INTEL-LEWISBURG-PCH/MASK")
test.Suite{
{
Pad: test.Pad{ID: "GPP_Bxx", DW0: 0x00000000, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_Bxx", DW0: 0x00000000, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPIO_BIDIRECT(GPP_Bxx, 0, NONE, RSMRST, LEVEL, ACPI),",
Long: "_PAD_CFG_STRUCT(GPP_Bxx, PAD_FUNC(GPIO) | PAD_RESET(RSMRST), 0),",
},
},
}.Run(t, "INTEL-LEWISBURG-PCH/EMRTY", lewisburg)
}.Run(t, "INTEL-LEWISBURG-PCH/EMRTY")
}

105
util/intelp2m/platforms/lbg/macro.go
View file

@ -1,105 +1,48 @@
package lbg
import (
"fmt"
"review.coreboot.org/coreboot.git/util/intelp2m/fields"
"review.coreboot.org/coreboot.git/util/intelp2m/logs"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common/register/bits"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/snr"
)
const (
PAD_CFG_DW0_RO_FIELDS = (0x1 << 27) | (0x1 << 24) | (0x3 << 21) | (0xf << 16) | 0xfc
PAD_CFG_DW1_RO_FIELDS = 0xfdffc3ff
DW0Mask uint32 = (0b1 << 27) | (0b1 << 24) | (0b11 << 21) | (0b1111 << 16) | 0b11111100
DW1Mask uint32 = 0b11111101111111111100001111111111
)
type InheritanceMacro interface {
Pull()
GpiMacroAdd()
GpoMacroAdd()
NativeFunctionMacroAdd()
NoConnMacroAdd()
type BasePlatform struct {
// based on the Sunrise Point platform
snr.BasePlatform
}
type PlatformSpecific struct {
InheritanceMacro
InheritanceTemplate
func InitBasePlatform(dw0, dw0mask uint32, dw1, dw1mask uint32) BasePlatform {
return BasePlatform{snr.InitBasePlatform(dw0, dw0mask, dw1, dw1mask)}
}
// RemmapRstSrc - remmap Pad Reset Source Config
func (PlatformSpecific) RemmapRstSrc() {
macro := common.GetMacro()
dw0 := macro.GetRegisterDW0()
func GetPlatform(dw0, dw1 uint32) common.PlatformIf {
p := InitBasePlatform(dw0, DW0Mask, dw1, DW1Mask)
return &p
}
// Override the base platform method
func (p *BasePlatform) RemapRstSrc(m *common.Macro) {
dw0 := p.GetRegisterDW0()
remapping := map[uint32]uint32{
0: (bits.RstCfgRSMRST << bits.DW0PadRstCfg),
1: (bits.RstCfgDEEP << bits.DW0PadRstCfg),
2: (bits.RstCfgPLTRST << bits.DW0PadRstCfg),
0b00: bits.RstCfgRSMRST << bits.DW0PadRstCfg,
0b01: bits.RstCfgDEEP << bits.DW0PadRstCfg,
0b10: bits.RstCfgPLTRST << bits.DW0PadRstCfg,
}
resetsrc, valid := remapping[dw0.GetResetConfig()]
source, valid := remapping[dw0.GetResetConfig()]
if valid {
// dw0.SetResetConfig(resetsrc)
ResetConfigFieldVal := (dw0.Value & 0x3fffffff) | remapping[dw0.GetResetConfig()]
dw0.Value = ResetConfigFieldVal
dw0.Value &= 0x3fffffff
dw0.Value |= source
} else {
fmt.Println("Invalid Pad Reset Config [ 0x", resetsrc, " ] for ", macro.PadIdGet())
logs.Errorf("%s: skip re-mapping: DW0 %s: invalid reset config source value 0b%b",
m.GetPadId(), dw0, dw0.GetResetConfig())
}
mask := bits.DW0[bits.DW0PadRstCfg]
dw0.CntrMaskFieldsClear(mask)
}
// Adds The Pad Termination (TERM) parameter from PAD_CFG_DW1 to the macro
// as a new argument
func (platform PlatformSpecific) Pull() {
platform.InheritanceMacro.Pull()
}
// Adds PAD_CFG_GPI macro with arguments
func (platform PlatformSpecific) GpiMacroAdd() {
platform.InheritanceMacro.GpiMacroAdd()
}
// Adds PAD_CFG_GPO macro with arguments
func (platform PlatformSpecific) GpoMacroAdd() {
platform.InheritanceMacro.GpoMacroAdd()
}
// Adds PAD_CFG_NF macro with arguments
func (platform PlatformSpecific) NativeFunctionMacroAdd() {
platform.InheritanceMacro.NativeFunctionMacroAdd()
}
// Adds PAD_NC macro
func (platform PlatformSpecific) NoConnMacroAdd() {
platform.InheritanceMacro.NoConnMacroAdd()
}
// GenMacro - generate pad macro
// dw0val : DW0 config register value
// dw1val : DW1 config register value
// return: string of macro
func (platform PlatformSpecific) GenMacro(id string, dw0Val uint32, dw1Val uint32, ownership uint8) string {
// The GPIO controller architecture in Lewisburg and Sunrise are very similar,
// so we will inherit some platform-dependent functions from Sunrise.
macro := common.GetInstanceMacro(
PlatformSpecific{
InheritanceMacro: snr.PlatformSpecific{},
},
fields.InterfaceGet(),
)
macro.Clear()
dw0 := macro.GetRegisterDW0()
dw0.CntrMaskFieldsClear(bits.All32)
dw1 := macro.GetRegisterDW1()
dw1.CntrMaskFieldsClear(bits.All32)
dw0.Value = dw0Val
dw1.Value = dw1Val
dw0.ReadOnly = PAD_CFG_DW0_RO_FIELDS
dw1.ReadOnly = PAD_CFG_DW1_RO_FIELDS
macro.PadIdSet(id).SetPadOwnership(ownership)
return macro.Generate()
}

19
util/intelp2m/platforms/lbg/template.go
View file

@ -1,15 +1,12 @@
package lbg
type InheritanceTemplate interface {
KeywordCheck(line string) bool
}
import "review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
// Group: "GPP_A", "GPP_B", "GPP_F", "GPP_C", "GPP_D", "GPP_E", "GPD", "GPP_I", "GPP_J",
// "GPP_K", "GPP_G", "GPP_H", "GPP_L"
// KeywordCheck - This function is used to filter parsed lines of the configuration file and
// returns true if the keyword is contained in the line.
// line : string from the configuration file
func (platform PlatformSpecific) KeywordCheck(line string) bool {
return platform.InheritanceTemplate.KeywordCheck(line)
// CheckKeyword() parses lines of the configuration file and returns true if the keyword is
// contained in the line
// "GPP_A", "GPP_B", "GPP_F", "GPP_C", "GPP_D", "GPP_E", "GPD", "GPP_I", "GPP_J",
// "GPP_K", "GPP_G", "GPP_H", "GPP_L"
func CheckKeyword(line string) bool {
included, _ := common.KeywordsCheck(line, "GPP_", "GPD")
return included
}

111
util/intelp2m/platforms/mtl/macro.go
View file

@ -1,114 +1,57 @@
package mtl
import (
"fmt"
"strings"
"review.coreboot.org/coreboot.git/util/intelp2m/fields"
"review.coreboot.org/coreboot.git/util/intelp2m/logs"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/cnl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common/register/bits"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/snr"
)
const (
PAD_CFG_DW0_RO_FIELDS = (0x1 << 27) | (0x1 << 24) | (0x3 << 21) | (0xf << 16) | 0xfc
PAD_CFG_DW1_RO_FIELDS = 0xfdffc3ff
DW0Mask = (0b1 << 27) | (0b1 << 24) | (0b11 << 21) | (0b1111 << 16) | 0b11111100
DW1Mask = 0b11111101111111111100001111111111
)
type InheritanceMacro interface {
Pull()
GpiMacroAdd()
GpoMacroAdd()
NativeFunctionMacroAdd()
NoConnMacroAdd()
type BasePlatform struct {
// based on the Cannon Lake platform
cnl.BasePlatform
}
type PlatformSpecific struct {
InheritanceMacro
func InitBasePlatform(dw0, dw0mask uint32, dw1, dw1mask uint32) BasePlatform {
return BasePlatform{cnl.InitBasePlatform(dw0, dw0mask, dw1, dw1mask)}
}
// RemmapRstSrc - remmap Pad Reset Source Config
func (PlatformSpecific) RemmapRstSrc() {
macro := common.GetMacro()
if strings.Contains(macro.PadIdGet(), "GPD") {
func GetPlatform(dw0, dw1 uint32) common.PlatformIf {
p := InitBasePlatform(dw0, DW0Mask, dw1, DW1Mask)
return &p
}
// Override the base platform method
func (p *BasePlatform) RemapRstSrc(m *common.Macro) {
if strings.Contains(m.GetPadId(), "GPD") {
// See reset map for the MeteorLake GPD group at
// https://github.com/coreboot/coreboot/blob/master/src/soc/intel/meteorlake/gpio.c#L10
// remmap is not required because it is the same as common.
return
}
dw0 := macro.GetRegisterDW0()
var remapping = map[uint32]uint32{
0: bits.RstCfgRSMRST << bits.DW0PadRstCfg,
1: bits.RstCfgDEEP << bits.DW0PadRstCfg,
2: bits.RstCfgPLTRST << bits.DW0PadRstCfg,
3: bits.RstCfgPWROK << bits.RstCfgPWROK,
remapping := map[uint32]uint32{
0b00: bits.RstCfgRSMRST << bits.DW0PadRstCfg,
0b01: bits.RstCfgDEEP << bits.DW0PadRstCfg,
0b10: bits.RstCfgPLTRST << bits.DW0PadRstCfg,
0b11: bits.RstCfgPWROK << bits.RstCfgPWROK,
}
resetsrc, valid := remapping[dw0.GetResetConfig()]
dw0 := p.GetRegisterDW0()
source, valid := remapping[dw0.GetResetConfig()]
if valid {
// dw0.SetResetConfig(resetsrc)
ResetConfigFieldVal := (dw0.Value & 0x3fffffff) | remapping[dw0.GetResetConfig()]
dw0.Value = ResetConfigFieldVal
dw0.Value &= 0x3fffffff
dw0.Value |= source
} else {
fmt.Println("Invalid Pad Reset Config [ 0x", resetsrc, " ] for ", macro.PadIdGet())
logs.Errorf("%s: skip re-mapping: DW0 %s: invalid reset config source value 0b%b",
m.GetPadId(), dw0, dw0.GetResetConfig())
}
mask := bits.DW0[bits.DW0PadRstCfg]
dw0.CntrMaskFieldsClear(mask)
}
// Adds The Pad Termination (TERM) parameter from PAD_CFG_DW1 to the macro
// as a new argument
func (platform PlatformSpecific) Pull() {
platform.InheritanceMacro.Pull()
}
// Adds PAD_CFG_GPI macro with arguments
func (platform PlatformSpecific) GpiMacroAdd() {
platform.InheritanceMacro.GpiMacroAdd()
}
// Adds PAD_CFG_GPO macro with arguments
func (platform PlatformSpecific) GpoMacroAdd() {
platform.InheritanceMacro.GpoMacroAdd()
}
// Adds PAD_CFG_NF macro with arguments
func (platform PlatformSpecific) NativeFunctionMacroAdd() {
platform.InheritanceMacro.NativeFunctionMacroAdd()
}
// Adds PAD_NC macro
func (platform PlatformSpecific) NoConnMacroAdd() {
platform.InheritanceMacro.NoConnMacroAdd()
}
// GenMacro - generate pad macro
// dw0 : DW0 config register value
// dw1 : DW1 config register value
// return: string of macro
func (PlatformSpecific) GenMacro(id string, dw0Val, dw1Val uint32, ownership uint8) string {
macro := common.GetInstanceMacro(
PlatformSpecific{
InheritanceMacro: cnl.PlatformSpecific{
InheritanceMacro: snr.PlatformSpecific{},
},
},
fields.InterfaceGet(),
)
macro.Clear()
dw0 := macro.GetRegisterDW0()
dw0.CntrMaskFieldsClear(bits.All32)
dw1 := macro.GetRegisterDW1()
dw1.CntrMaskFieldsClear(bits.All32)
dw0.Value = dw0Val
dw1.Value = dw1Val
dw0.ReadOnly = PAD_CFG_DW0_RO_FIELDS
dw1.ReadOnly = PAD_CFG_DW1_RO_FIELDS
macro.PadIdSet(id).SetPadOwnership(ownership)
return macro.Generate()
}

41
util/intelp2m/platforms/mtl/mtl_test.go
View file

@ -3,108 +3,103 @@ package mtl_test
import (
"testing"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/cnl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/mtl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/snr"
"review.coreboot.org/coreboot.git/util/intelp2m/config/p2m"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/test"
)
func TestGenMacro(t *testing.T) {
meteorlake := mtl.PlatformSpecific{
InheritanceMacro: cnl.PlatformSpecific{
InheritanceMacro: snr.PlatformSpecific{},
},
}
p2m.Config.Platform = p2m.Meteor
test.Suite{
{
Pad: test.Pad{ID: "GPP_V1", DW0: 0x11111111, DW1: 0x11111111, Ownership: 1},
Pad: test.Pad{ID: "GPP_V1", DW0: 0x11111111, DW1: 0x11111111, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_V1, DN_20K, RSMRST, NF4),",
Long: "_PAD_CFG_STRUCT(GPP_V1, PAD_FUNC(NF4) | PAD_RESET(RSMRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE) | (1 << 28) | 1, PAD_PULL(DN_20K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(DISPUPD) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_C2", DW0: 0x22222222, DW1: 0x22222222, Ownership: 0},
Pad: test.Pad{ID: "GPP_C2", DW0: 0x22222222, DW1: 0x22222222, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_TERM_GPO(GPP_C2, 0, INVALID, RSMRST),",
Long: "_PAD_CFG_STRUCT(GPP_C2, PAD_FUNC(GPIO) | PAD_RESET(RSMRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(RX_DISABLE) | (1 << 29) | (1 << 1), PAD_CFG1_TOL_1V8PAD_PULL(INVALID) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(ENPD)),",
},
},
{
Pad: test.Pad{ID: "GPP_A3", DW0: 0x44444444, DW1: 0x44444444, Ownership: 1},
Pad: test.Pad{ID: "GPP_A3", DW0: 0x44444444, DW1: 0x44444444, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_A3, INVALID, DEEP, NF1),",
Long: "_PAD_CFG_STRUCT(GPP_A3, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_IRQ_ROUTE(SMI), PAD_PULL(INVALID) | PAD_IOSSTATE(Tx0RxDCRx0) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_E4", DW0: 0x88888888, DW1: 0x88888888, Ownership: 0},
Pad: test.Pad{ID: "GPP_E4", DW0: 0x88888888, DW1: 0x88888888, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_E4, DN_5K, PLTRST, NF2),",
Long: "_PAD_CFG_STRUCT(GPP_E4, PAD_FUNC(NF2) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT), PAD_PULL(DN_5K) | PAD_IOSSTATE(Tx0RxDCRx1)),",
},
},
}.Run(t, "INTEL-METEOR-LAKE-PCH/SLIDING-ONE-IN-NIBBLE-TEST", meteorlake)
}.Run(t, "INTEL-METEOR-LAKE-PCH/SLIDING-ONE-IN-NIBBLE-TEST")
test.Suite{
{
Pad: test.Pad{ID: "GPP_H5", DW0: 0xEEEEEEEE, DW1: 0xEEEEEEEE, Ownership: 1},
Pad: test.Pad{ID: "GPP_H5", DW0: 0xEEEEEEEE, DW1: 0xEEEEEEEE, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_H5, UP_2K, PWROK, NF3),",
Long: "_PAD_CFG_STRUCT(GPP_H5, PAD_FUNC(NF3) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_RX_POL(INVERT) | PAD_BUF(RX_DISABLE) | (1 << 29) | (1 << 1), PAD_CFG1_TOL_1V8PAD_PULL(UP_2K) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPD) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_F6", DW0: 0xDDDDDDDD, DW1: 0xDDDDDDDD, Ownership: 0},
Pad: test.Pad{ID: "GPP_F6", DW0: 0xDDDDDDDD, DW1: 0xDDDDDDDD, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_F6, INVALID, PWROK, NF7),",
Long: "_PAD_CFG_STRUCT(GPP_F6, PAD_FUNC(NF7) | PAD_TRIG(OFF) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 28) | 1, PAD_PULL(INVALID) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(DISPUPD)),",
},
},
{
Pad: test.Pad{ID: "GPP_S7", DW0: 0xBBBBBBBB, DW1: 0xBBBBBBBB, Ownership: 1},
Pad: test.Pad{ID: "GPP_S7", DW0: 0xBBBBBBBB, DW1: 0xBBBBBBBB, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_S7, INVALID, PLTRST, NF6),",
Long: "_PAD_CFG_STRUCT(GPP_S7, PAD_FUNC(NF6) | PAD_RESET(PLTRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(NMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(INVALID) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPU) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_B8", DW0: 0x77777777, DW1: 0x77777777, Ownership: 0},
Pad: test.Pad{ID: "GPP_B8", DW0: 0x77777777, DW1: 0x77777777, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_B8, UP_667, DEEP, NF5),",
Long: "_PAD_CFG_STRUCT(GPP_B8, PAD_FUNC(NF5) | PAD_RESET(DEEP) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(UP_667) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPU)),",
},
},
}.Run(t, "INTEL-METEOR-LAKE-PCH/SLIDING-ZERO-IN-NIBBLE-TEST", meteorlake)
}.Run(t, "INTEL-METEOR-LAKE-PCH/SLIDING-ZERO-IN-NIBBLE-TEST")
test.Suite{
{
Pad: test.Pad{ID: "GPP_D9", DW0: 0x33333333, DW1: 0x33333333, Ownership: 1},
Pad: test.Pad{ID: "GPP_D9", DW0: 0x33333333, DW1: 0x33333333, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_D9, UP_20K, RSMRST, NF4),",
Long: "_PAD_CFG_STRUCT(GPP_D9, PAD_FUNC(NF4) | PAD_RESET(RSMRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(UP_20K) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPU) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPD10", DW0: 0x66666666, DW1: 0x66666666, Ownership: 0},
Pad: test.Pad{ID: "GPD10", DW0: 0x66666666, DW1: 0x66666666, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPD10, UP_1K, DEEP, NF1),",
Long: "_PAD_CFG_STRUCT(GPD10, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(RX_DISABLE) | (1 << 29) | (1 << 1), PAD_CFG1_TOL_1V8PAD_PULL(UP_1K) | PAD_IOSSTATE(TxDRxE) | PAD_IOSTERM(ENPD)),",
},
},
{
Pad: test.Pad{ID: "GPP_V11", DW0: 0xCCCCCCCC, DW1: 0xCCCCCCCC, Ownership: 1},
Pad: test.Pad{ID: "GPP_V11", DW0: 0xCCCCCCCC, DW1: 0xCCCCCCCC, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_V11, INVALID, PWROK, NF3),",
Long: "_PAD_CFG_STRUCT(GPP_V11, PAD_FUNC(NF3) | PAD_TRIG(OFF) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_RX_POL(INVERT), PAD_PULL(INVALID) | PAD_IOSSTATE(Tx1RxDCRx0) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_C12", DW0: 0x99999999, DW1: 0x99999999, Ownership: 0},
Pad: test.Pad{ID: "GPP_C12", DW0: 0x99999999, DW1: 0x99999999, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_C12, INVALID, PLTRST, NF6),",
Long: "_PAD_CFG_STRUCT(GPP_C12, PAD_FUNC(NF6) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 28) | 1, PAD_PULL(INVALID) | PAD_IOSSTATE(Tx1RxE) | PAD_IOSTERM(DISPUPD)),",
},
},
}.Run(t, "INTEL-METEOR-LAKE-PCH/SLIDING-ONE-ONE-IN-NIBBLE-TEST", meteorlake)
}.Run(t, "INTEL-METEOR-LAKE-PCH/SLIDING-ONE-ONE-IN-NIBBLE-TEST")
}

4
util/intelp2m/platforms/mtl/template.go
View file

@ -5,10 +5,10 @@ import "review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
// Group : "GPP_V", "GPP_C", "GPP_A", "GPP_E", "GPP_H", "GPP_F", "GPP_S", "GPP_B", "GPP_D",
// "GPD", "VGPIO_USB", "VGPIO_PCIE"
// KeywordCheck - This function is used to filter parsed lines of the configuration file and
// CheckKeyword - This function is used to filter parsed lines of the configuration file and
// returns true if the keyword is contained in the line.
// line : string from the configuration file
func (PlatformSpecific) KeywordCheck(line string) bool {
func CheckKeyword(line string) bool {
isIncluded, _ := common.KeywordsCheck(line, "GPP_", "GPD", "VGPIO")
return isIncluded
}

62
util/intelp2m/platforms/platforms.go Normal file
View file

@ -0,0 +1,62 @@
package platforms
import (
"fmt"
"review.coreboot.org/coreboot.git/util/intelp2m/config/p2m"
"review.coreboot.org/coreboot.git/util/intelp2m/logs"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/adl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/apl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/cnl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/ebg"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/jsl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/lbg"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/mtl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/snr"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/tgl"
)
type KeywordAction func(line string) bool
type Constructor func(dw0, dw1 uint32) common.PlatformIf
var platformConstructorMap = map[p2m.PlatformType]Constructor{
p2m.Alder: adl.GetPlatform,
p2m.Apollo: apl.GetPlatform,
p2m.Cannon: cnl.GetPlatform,
p2m.Sunrise: snr.GetPlatform,
p2m.Tiger: tgl.GetPlatform,
p2m.Jasper: jsl.GetPlatform,
p2m.Meteor: mtl.GetPlatform,
p2m.Emmitsburg: ebg.GetPlatform,
p2m.Lewisburg: lbg.GetPlatform,
}
func GetKeywordChekingAction() KeywordAction {
actions := map[p2m.PlatformType]KeywordAction{
p2m.Alder: adl.CheckKeyword,
p2m.Apollo: apl.CheckKeyword,
p2m.Cannon: cnl.CheckKeyword,
p2m.Sunrise: snr.CheckKeyword,
p2m.Tiger: tgl.CheckKeyword,
p2m.Jasper: jsl.CheckKeyword,
p2m.Meteor: mtl.CheckKeyword,
p2m.Emmitsburg: ebg.CheckKeyword,
p2m.Lewisburg: lbg.CheckKeyword,
}
action, exist := actions[p2m.Config.Platform]
if !exist {
logs.Errorf("unregistered platform type %d", p2m.Config.Platform)
return nil
}
return action
}
func GetConstructor() (Constructor, error) {
constructor, exist := platformConstructorMap[p2m.Config.Platform]
if !exist {
return nil, fmt.Errorf("unregistered platform type %d", p2m.Config.Platform)
}
return constructor, nil
}

231
util/intelp2m/platforms/snr/macro.go
View file

@ -1,150 +1,149 @@
package snr
import (
"fmt"
"strings"
"review.coreboot.org/coreboot.git/util/intelp2m/config/p2m"
"review.coreboot.org/coreboot.git/util/intelp2m/fields"
"review.coreboot.org/coreboot.git/util/intelp2m/logs"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common/register/bits"
)
const (
PAD_CFG_DW0_RO_FIELDS = (0x1 << 27) | (0x1 << 24) | (0x3 << 21) | (0xf << 16) | 0xfc
PAD_CFG_DW1_RO_FIELDS = 0xfdffc3ff
DW0Mask uint32 = (0b1 << 27) | (0b1 << 24) | (0b11 << 21) | (0b1111 << 16) | 0b11111100
DW1Mask uint32 = 0b11111101111111111100001111111111
)
type PlatformSpecific struct{}
type BasePlatform struct {
common.BasePlatform
}
// RemmapRstSrc - remmap Pad Reset Source Config
func (PlatformSpecific) RemmapRstSrc() {
macro := common.GetMacro()
if strings.Contains(macro.PadIdGet(), "GPD") {
func InitBasePlatform(dw0, dw0mask uint32, dw1, dw1mask uint32) BasePlatform {
return BasePlatform{common.InitBasePlatform(dw0, dw0mask, dw1, dw1mask)}
}
func GetPlatform(dw0, dw1 uint32) common.PlatformIf {
p := InitBasePlatform(dw0, DW0Mask, dw1, DW1Mask)
return &p
}
// RemmapRstSrc() remaps Pad Reset Source Config
func (p *BasePlatform) RemapRstSrc(m *common.Macro) {
if strings.Contains(m.GetPadId(), "GPD") {
// See reset map for the Sunrise GPD Group in the Community 2:
// https://github.com/coreboot/coreboot/blob/master/src/soc/intel/skylake/gpio.c#L15
// remmap is not required because it is the same as common.
return
}
dw0 := macro.GetRegisterDW0()
dw0 := p.GetRegisterDW0()
remapping := map[uint32]uint32{
0: bits.RstCfgRSMRST << bits.DW0PadRstCfg,
1: bits.RstCfgDEEP << bits.DW0PadRstCfg,
2: bits.RstCfgPLTRST << bits.DW0PadRstCfg,
0b00: bits.RstCfgRSMRST << bits.DW0PadRstCfg,
0b01: bits.RstCfgDEEP << bits.DW0PadRstCfg,
0b10: bits.RstCfgPLTRST << bits.DW0PadRstCfg,
}
resetsrc, valid := remapping[dw0.GetResetConfig()]
if valid {
// dw0.SetResetConfig(resetsrc)
ResetConfigFieldVal := (dw0.Value & 0x3fffffff) | remapping[dw0.GetResetConfig()]
dw0.Value = ResetConfigFieldVal
if source, valid := remapping[dw0.GetResetConfig()]; valid {
dw0.Value &= 0x3fffffff
dw0.Value |= source
} else {
fmt.Println("Invalid Pad Reset Config [ 0x", resetsrc, " ] for ", macro.PadIdGet())
logs.Errorf("%s: skip re-mapping: DW0 %s: invalid reset config source value 0b%b",
m.GetPadId(), dw0, dw0.GetResetConfig())
}
mask := bits.DW0[bits.DW0PadRstCfg]
dw0.CntrMaskFieldsClear(mask)
dw0.CntrMaskFieldsClear(bits.DW0[bits.DW0PadRstCfg])
}
// Adds The Pad Termination (TERM) parameter from PAD_CFG_DW1 to the macro
// as a new argument
func (PlatformSpecific) Pull() {
macro := common.GetMacro()
dw1 := macro.GetRegisterDW1()
// Pull() adds The Pad Termination (TERM) parameter from PAD_CFG_DW1 to the macro
func (p *BasePlatform) Pull(m *common.Macro) {
dw1 := p.GetRegisterDW1()
var pull = map[uint32]string{
0x0: "NONE",
0x2: "DN_5K",
0x4: "DN_20K",
0x9: "UP_1K",
0xa: "UP_5K",
0xb: "UP_2K",
0xc: "UP_20K",
0xd: "UP_667",
0xf: "NATIVE",
0b0000: "NONE",
0b0010: "DN_5K",
0b0100: "DN_20K",
0b1001: "UP_1K",
0b1010: "UP_5K",
0b1011: "UP_2K",
0b1100: "UP_20K",
0b1101: "UP_667",
0b1111: "NATIVE",
}
str, valid := pull[dw1.GetTermination()]
term, valid := pull[dw1.GetTermination()]
if !valid {
str = "INVALID"
fmt.Println("Error",
macro.PadIdGet(),
" invalid TERM value = ",
int(dw1.GetTermination()))
term = "INVALID"
logs.Errorf("%s: DW1 %s: invalid termination value 0b%b",
dw1, m.GetPadId(), dw1.GetTermination())
}
macro.Separator().Add(str)
m.Separator().Add(term)
}
// Generate macro to cause peripheral IRQ when configured in GPIO input mode
func ioApicRoute() bool {
macro := common.GetMacro()
dw0 := macro.GetRegisterDW0()
// ioApicRoute() generate macro to cause peripheral IRQ when configured in GPIO input mode
func ioApicRoute(p *BasePlatform, m *common.Macro) bool {
dw0 := p.GetRegisterDW0()
if dw0.GetGPIOInputRouteIOxAPIC() == 0 {
return false
}
macro.Add("_APIC")
m.Add("_APIC")
if dw0.GetRXLevelEdgeConfiguration() == bits.TrigLEVEL {
if dw0.GetRxInvert() != 0 {
// PAD_CFG_GPI_APIC_LOW(pad, pull, rst)
macro.Add("_LOW")
m.Add("_LOW")
} else {
// PAD_CFG_GPI_APIC_HIGH(pad, pull, rst)
macro.Add("_HIGH")
m.Add("_HIGH")
}
macro.Add("(").Id().Pull().Rstsrc().Add("),")
m.Add("(").Id().Pull().Rstsrc().Add("),")
return true
}
// e.g. PAD_CFG_GPI_APIC_IOS(pad, pull, rst, trig, inv, iosstate, iosterm)
macro.Add("_IOS(").Id().Pull().Rstsrc().Trig().Invert().Add(", TxLASTRxE, SAME),")
m.Add("_IOS(").Id().Pull().Rstsrc().Trig().Invert().Add(", TxLASTRxE, SAME),")
return true
}
// Generate macro to cause NMI when configured in GPIO input mode
func nmiRoute() bool {
macro := common.GetMacro()
if macro.GetRegisterDW0().GetGPIOInputRouteNMI() == 0 {
// nmiRoute() generate macro to cause NMI when configured in GPIO input mode
func nmiRoute(p *BasePlatform, m *common.Macro) bool {
if p.GetRegisterDW0().GetGPIOInputRouteNMI() == 0 {
return false
}
// PAD_CFG_GPI_NMI(GPIO_24, UP_20K, DEEP, LEVEL, INVERT),
macro.Add("_NMI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
m.Add("_NMI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
return true
}
// Generate macro to cause SCI when configured in GPIO input mode
func sciRoute() bool {
macro := common.GetMacro()
dw0 := macro.GetRegisterDW0()
// sciRoute() generate macro to cause SCI when configured in GPIO input mode
func sciRoute(p *BasePlatform, m *common.Macro) bool {
dw0 := p.GetRegisterDW0()
if dw0.GetGPIOInputRouteSCI() == 0 {
return false
}
// PAD_CFG_GPI_SCI(GPP_B18, UP_20K, PLTRST, LEVEL, INVERT),
macro.Add("_SCI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
m.Add("_SCI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
return true
}
// Generate macro to cause SMI when configured in GPIO input mode
func smiRoute() bool {
macro := common.GetMacro()
dw0 := macro.GetRegisterDW0()
// smiRoute() generates macro to cause SMI when configured in GPIO input mode
func smiRoute(p *BasePlatform, m *common.Macro) bool {
dw0 := p.GetRegisterDW0()
if dw0.GetGPIOInputRouteSMI() == 0 {
return false
}
// PAD_CFG_GPI_SMI(GPP_E7, NONE, DEEP, LEVEL, NONE),
macro.Add("_SMI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
m.Add("_SMI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
return true
}
// Adds PAD_CFG_GPI macro with arguments
func (PlatformSpecific) GpiMacroAdd() {
macro := common.GetMacro()
// AddGpiMacro() adds PAD_CFG_GPI macro with arguments
func (p *BasePlatform) AddGpiMacro(m *common.Macro) {
var ids []string
macro.Set("PAD_CFG_GPI")
for routeid, isRoute := range map[string]func() bool{
m.Set("PAD_CFG_GPI")
for routeid, isRoute := range map[string]func(*BasePlatform, *common.Macro) bool{
"IOAPIC": ioApicRoute,
"SCI": sciRoute,
"SMI": smiRoute,
"NMI": nmiRoute,
} {
if isRoute() {
if isRoute(p, m) {
ids = append(ids, routeid)
}
}
@ -152,80 +151,77 @@ func (PlatformSpecific) GpiMacroAdd() {
switch argc := len(ids); argc {
case 0:
// e.g. PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, own)
macro.Add("_TRIG_OWN").Add("(").Id().Pull().Rstsrc().Trig().Own().Add("),")
m.Add("_TRIG_OWN").Add("(").Id().Pull().Rstsrc().Trig().Own().Add("),")
case 1:
// GPI with IRQ route
if p2m.Config.IgnoredFields {
// Set Host Software Ownership to ACPI mode
macro.SetPadOwnership(common.PAD_OWN_ACPI)
m.SetOwnershipAcpi()
}
case 2:
// PAD_CFG_GPI_DUAL_ROUTE(pad, pull, rst, trig, inv, route1, route2)
macro.Set("PAD_CFG_GPI_DUAL_ROUTE(").Id().Pull().Rstsrc().Trig().Invert()
macro.Add(", " + ids[0] + ", " + ids[1] + "),")
m.Set("PAD_CFG_GPI_DUAL_ROUTE(").Id().Pull().Rstsrc().Trig().Invert()
m.Add(", " + ids[0] + ", " + ids[1] + "),")
if p2m.Config.IgnoredFields {
// Set Host Software Ownership to ACPI mode
macro.SetPadOwnership(common.PAD_OWN_ACPI)
m.SetOwnershipAcpi()
}
default:
// Clear the control mask so that the check fails and "Advanced" macro is
// generated
macro.GetRegisterDW0().CntrMaskFieldsClear(bits.All32)
dw0 := p.GetRegisterDW0()
dw0.CntrMaskFieldsClear(bits.All32)
}
}
// Adds PAD_CFG_GPO macro with arguments
func (PlatformSpecific) GpoMacroAdd() {
macro := common.GetMacro()
dw0 := macro.GetRegisterDW0()
term := macro.GetRegisterDW1().GetTermination()
// AddGpoMacro() adds PAD_CFG_GPO macro with arguments
func (p *BasePlatform) AddGpoMacro(m *common.Macro) {
// #define PAD_CFG_GPO(pad, val, rst) \
// _PAD_CFG_STRUCT(pad, \
// PAD_FUNC(GPIO) | PAD_RESET(rst) | \
// PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | !!val, \
// PAD_PULL(NONE) | PAD_IOSSTATE(TxLASTRxE))
if dw0.GetRXLevelEdgeConfiguration() != bits.TrigOFF {
if dw0 := p.GetRegisterDW0(); dw0.GetRXLevelEdgeConfiguration() != bits.TrigOFF {
mask := bits.DW0[bits.DW0RxLevelEdgeConfiguration]
dw0.CntrMaskFieldsClear(mask)
}
macro.Set("PAD_CFG")
if macro.IsOwnershipDriver() {
m.Set("PAD_CFG")
if m.IsOwnershipDriver() {
// PAD_CFG_GPO_GPIO_DRIVER(pad, val, rst, pull)
macro.Add("_GPO_GPIO_DRIVER").Add("(").Id().Val().Rstsrc().Pull().Add("),")
m.Add("_GPO_GPIO_DRIVER").Add("(").Id().Val().Rstsrc().Pull().Add("),")
return
}
dw1 := p.GetRegisterDW1()
term := dw1.GetTermination()
if term != 0 {
// e.g. PAD_CFG_TERM_GPO(GPP_B23, 1, DN_20K, DEEP),
macro.Add("_TERM")
m.Add("_TERM")
}
macro.Add("_GPO").Add("(").Id().Val()
m.Add("_GPO").Add("(").Id().Val()
if term != 0 {
macro.Pull()
m.Pull()
}
macro.Rstsrc().Add("),")
m.Rstsrc().Add("),")
}
// Adds PAD_CFG_NF macro with arguments
func (PlatformSpecific) NativeFunctionMacroAdd() {
macro := common.GetMacro()
// AddNativeFunctionMacro() adds PAD_CFG_NF macro with arguments
func (p *BasePlatform) AddNativeFunctionMacro(m *common.Macro) {
// e.g. PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1)
macro.Set("PAD_CFG_NF")
if macro.GetRegisterDW1().GetPadTol() != 0 {
macro.Add("_1V8")
m.Set("PAD_CFG_NF")
if p.GetRegisterDW1().GetPadTol() != 0 {
m.Add("_1V8")
}
macro.Add("(").Id().Pull().Rstsrc().Padfn().Add("),")
m.Add("(").Id().Pull().Rstsrc().Padfn().Add("),")
}
// Adds PAD_NC macro
func (PlatformSpecific) NoConnMacroAdd() {
macro := common.GetMacro()
// AddNoConnMacro() adds PAD_NC macro
func (p *BasePlatform) AddNoConnMacro(m *common.Macro) {
// #define PAD_NC(pad, pull)
// _PAD_CFG_STRUCT(pad,
// PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE),
// PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE)),
dw0 := macro.GetRegisterDW0()
dw0 := p.GetRegisterDW0()
// Some fields of the configuration registers are hidden inside the macros,
// we should check them to update the corresponding bits in the control mask.
@ -237,32 +233,5 @@ func (PlatformSpecific) NoConnMacroAdd() {
mask := bits.DW0[bits.DW0PadRstCfg]
dw0.CntrMaskFieldsClear(mask)
}
macro.Set("PAD_NC").Add("(").Id().Pull().Add("),")
}
// GenMacro - generate pad macro
// dw0Val : DW0 config register value
// dw1Val : DW1 config register value
// return: string of macro
func (PlatformSpecific) GenMacro(id string, dw0Val uint32, dw1Val uint32, ownership uint8) string {
macro := common.GetInstanceMacro(
PlatformSpecific{},
fields.InterfaceGet(),
)
macro.Clear()
dw0 := macro.GetRegisterDW0()
dw0.CntrMaskFieldsClear(bits.All32)
dw1 := macro.GetRegisterDW1()
dw1.CntrMaskFieldsClear(bits.All32)
dw0.Value = dw0Val
dw1.Value = dw1Val
dw0.ReadOnly = PAD_CFG_DW0_RO_FIELDS
dw1.ReadOnly = PAD_CFG_DW1_RO_FIELDS
macro.PadIdSet(id).SetPadOwnership(ownership)
return macro.Generate()
m.Set("PAD_NC").Add("(").Id().Pull().Add("),")
}

65
util/intelp2m/platforms/snr/snr_test.go
View file

@ -3,207 +3,208 @@ package snr_test
import (
"testing"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/snr"
"review.coreboot.org/coreboot.git/util/intelp2m/config/p2m"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/test"
)
func TestGenMacro(t *testing.T) {
sunrise := snr.PlatformSpecific{}
p2m.Config.Platform = p2m.Sunrise
test.Suite{
{ /* GPP_A1 - LAD0 */
Pad: test.Pad{ID: "GPP_A1", DW0: 0x84000402, DW1: 0x00003000, Ownership: 0},
Pad: test.Pad{ID: "GPP_A1", DW0: 0x84000402, DW1: 0x00003000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_A1, UP_20K, PLTRST, NF1),",
Long: "_PAD_CFG_STRUCT(GPP_A1, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | (1 << 1), PAD_PULL(UP_20K)),",
},
},
{ /* GPP_A5 - LFRAME# */
Pad: test.Pad{ID: "GPP_A5", DW0: 0x84000600, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_A5", DW0: 0x84000600, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_A5, NONE, PLTRST, NF1),",
Long: "_PAD_CFG_STRUCT(GPP_A5, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), 0),",
},
},
{ /* GPP_A22 - GPIO */
Pad: test.Pad{ID: "GPP_A22", DW0: 0x84000102, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_A22", DW0: 0x84000102, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPI_TRIG_OWN(GPP_A22, NONE, PLTRST, OFF, ACPI),",
Long: "_PAD_CFG_STRUCT(GPP_A22, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
},
},
{ /* GPP_B3 - GPIO */
Pad: test.Pad{ID: "GPP_B3", DW0: 0x44000201, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_B3", DW0: 0x44000201, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPO(GPP_B3, 1, DEEP),",
Long: "_PAD_CFG_STRUCT(GPP_B3, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, 0),",
},
},
{ /* GPP_B5 - GPIO */
Pad: test.Pad{ID: "GPP_B5", DW0: 0x84000100, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_B5", DW0: 0x84000100, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPI_TRIG_OWN(GPP_B5, NONE, PLTRST, OFF, ACPI),",
Long: "_PAD_CFG_STRUCT(GPP_B5, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),",
},
},
{ /* GPP_B8 - NC */
Pad: test.Pad{ID: "GPP_B8", DW0: 0x44000300, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_B8", DW0: 0x44000300, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_NC(GPP_B8, NONE),",
Long: "_PAD_CFG_STRUCT(GPP_B8, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),",
},
},
{ /* GPP_C2 - GPIO */
Pad: test.Pad{ID: "GPP_C2", DW0: 0x44000201, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_C2", DW0: 0x44000201, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPO(GPP_C2, 1, DEEP),",
Long: "_PAD_CFG_STRUCT(GPP_C2, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, 0),",
},
},
{ /* GPP_C10 - GPIO */
Pad: test.Pad{ID: "GPP_C10", DW0: 0x04000000, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_C10", DW0: 0x04000000, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPIO_BIDIRECT(GPP_C10, 0, NONE, RSMRST, OFF, ACPI),",
Long: "_PAD_CFG_STRUCT(GPP_C10, PAD_FUNC(GPIO) | PAD_RESET(RSMRST) | PAD_TRIG(OFF), 0),",
},
},
{ /* GPP_C22 - UART2_RTS# */
Pad: test.Pad{ID: "GPP_C22", DW0: 0x84000600, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_C22", DW0: 0x84000600, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_C22, NONE, PLTRST, NF1),",
Long: "_PAD_CFG_STRUCT(GPP_C22, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), 0),",
},
},
{ /* GPP_C23 - GPIO */
Pad: test.Pad{ID: "GPP_C23", DW0: 0x40880102, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_C23", DW0: 0x40880102, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPI_SCI(GPP_C23, NONE, DEEP, LEVEL, INVERT),",
Long: "_PAD_CFG_STRUCT(GPP_C23, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
},
},
{ /* GPP_D0 - GPIO */
Pad: test.Pad{ID: "GPP_D0", DW0: 0x84000200, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_D0", DW0: 0x84000200, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPO(GPP_D0, 0, PLTRST),",
Long: "_PAD_CFG_STRUCT(GPP_D0, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), 0),",
},
},
{ /* GPP_D16 - GPIO */
Pad: test.Pad{ID: "GPP_D16", DW0: 0x84000100, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_D16", DW0: 0x84000100, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPI_TRIG_OWN(GPP_D16, NONE, PLTRST, OFF, ACPI),",
Long: "_PAD_CFG_STRUCT(GPP_D16, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),",
},
},
{ /* GPP_E0 - SATAXPCIE0 */
Pad: test.Pad{ID: "GPP_E0", DW0: 0x84000502, DW1: 0x00003000, Ownership: 0},
Pad: test.Pad{ID: "GPP_E0", DW0: 0x84000502, DW1: 0x00003000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_E0, UP_20K, PLTRST, NF1),",
Long: "_PAD_CFG_STRUCT(GPP_E0, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), PAD_PULL(UP_20K)),",
},
},
{ /* GPP_E7 - GPIO */
Pad: test.Pad{ID: "GPP_E7", DW0: 0x84000102, DW1: 0x00000000, Ownership: 1},
Pad: test.Pad{ID: "GPP_E7", DW0: 0x84000102, DW1: 0x00000000, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_GPI_TRIG_OWN(GPP_E7, NONE, PLTRST, OFF, DRIVER),",
Long: "_PAD_CFG_STRUCT(GPP_E7, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{ /* GPP_F2 - GPIO */
Pad: test.Pad{ID: "GPP_F2", DW0: 0x44000300, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_F2", DW0: 0x44000300, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_NC(GPP_F2, NONE),",
Long: "_PAD_CFG_STRUCT(GPP_F2, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),",
},
},
{ /* GPP_F12 - GPIO */
Pad: test.Pad{ID: "GPP_F12", DW0: 0x80900102, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_F12", DW0: 0x80900102, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPI_APIC_LOW(GPP_F12, NONE, PLTRST),",
Long: "_PAD_CFG_STRUCT(GPP_F12, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
},
},
{ /* GPP_F13 - GPIO */
Pad: test.Pad{ID: "GPP_F13", DW0: 0x80100102, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_F13", DW0: 0x80100102, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPI_APIC_HIGH(GPP_F13, NONE, PLTRST),",
Long: "_PAD_CFG_STRUCT(GPP_F13, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
},
},
{ /* GPP_F14 - GPIO */
Pad: test.Pad{ID: "GPP_F14", DW0: 0x40900102, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_F14", DW0: 0x40900102, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPI_APIC_LOW(GPP_F14, NONE, DEEP),",
Long: "_PAD_CFG_STRUCT(GPP_F14, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(IOAPIC) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
},
},
{ /* GPP_H13 - GPIO */
Pad: test.Pad{ID: "GPP_H13", DW0: 0x80100102, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_H13", DW0: 0x80100102, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPI_APIC_HIGH(GPP_H13, NONE, PLTRST),",
Long: "_PAD_CFG_STRUCT(GPP_H13, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
},
},
{ /* GPD1 - GPIO */
Pad: test.Pad{ID: "GPD1", DW0: 0x04000200, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPD1", DW0: 0x04000200, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPO(GPD1, 0, PWROK),",
Long: "_PAD_CFG_STRUCT(GPD1, PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), 0),",
},
},
{ /* GPD2 - LAN_WAKE# */
Pad: test.Pad{ID: "GPD2", DW0: 0x00080602, DW1: 0x00003c00, Ownership: 0},
Pad: test.Pad{ID: "GPD2", DW0: 0x00080602, DW1: 0x00003c00, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPD2, NATIVE, PWROK, NF1),",
Long: "_PAD_CFG_STRUCT(GPD2, PAD_FUNC(NF1) | PAD_IRQ_ROUTE(SCI) | PAD_BUF(RX_DISABLE) | (1 << 1), PAD_PULL(NATIVE)),",
},
},
{ /* GPD3 - PWRBTN# */
Pad: test.Pad{ID: "GPD3", DW0: 0x04000502, DW1: 0x00003000, Ownership: 0},
Pad: test.Pad{ID: "GPD3", DW0: 0x04000502, DW1: 0x00003000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1),",
Long: "_PAD_CFG_STRUCT(GPD3, PAD_FUNC(NF1) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), PAD_PULL(UP_20K)),",
},
},
{ /* GPD7 - GPIO */
Pad: test.Pad{ID: "GPD7", DW0: 0x84000103, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPD7", DW0: 0x84000103, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPI_TRIG_OWN(GPD7, NONE, PLTRST, OFF, ACPI),",
Long: "_PAD_CFG_STRUCT(GPD7, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1) | 1, 0),",
},
},
{ /* GPP_I1 - DDPC_HPD1 */
Pad: test.Pad{ID: "GPP_I1", DW0: 0x84000502, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_I1", DW0: 0x84000502, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_I1, NONE, PLTRST, NF1),",
Long: "_PAD_CFG_STRUCT(GPP_I1, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
},
},
{ /* GPP_I8 - DDPC_CTRLDATA */
Pad: test.Pad{ID: "GPP_I8", DW0: 0x84000500, DW1: 0x00001000, Ownership: 0},
Pad: test.Pad{ID: "GPP_I8", DW0: 0x84000500, DW1: 0x00001000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_I8, DN_20K, PLTRST, NF1),",
Long: "_PAD_CFG_STRUCT(GPP_I8, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), PAD_PULL(DN_20K)),",
},
},
}.Run(t, "INTEL-SUNRISE-PCH/PAD-MAP", sunrise)
}.Run(t, "INTEL-SUNRISE-PCH/PAD-MAP")
test.Suite{
{
Pad: test.Pad{ID: "GPP_Axx", DW0: 0xBFFFFFFF, DW1: 0xFFFFFFFF, Ownership: 1},
Pad: test.Pad{ID: "GPP_Axx", DW0: 0xBFFFFFFF, DW1: 0xFFFFFFFF, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_Axx, NATIVE, PLTRST, NF7),",
Long: "_PAD_CFG_STRUCT(GPP_Axx, PAD_FUNC(NF7) | PAD_RESET(PLTRST) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(NATIVE) | PAD_IOSSTATE(IGNORE) | PAD_IOSTERM(ENPU) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
}.Run(t, "INTEL-SUNRISE-PCH/MASK", sunrise)
}.Run(t, "INTEL-SUNRISE-PCH/MASK")
test.Suite{
{
Pad: test.Pad{ID: "GPP_Bxx", DW0: 0x00000000, DW1: 0x00000000, Ownership: 0},
Pad: test.Pad{ID: "GPP_Bxx", DW0: 0x00000000, DW1: 0x00000000, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPIO_BIDIRECT(GPP_Bxx, 0, NONE, RSMRST, LEVEL, ACPI),",
Long: "_PAD_CFG_STRUCT(GPP_Bxx, PAD_FUNC(GPIO) | PAD_RESET(RSMRST), 0),",
},
},
}.Run(t, "INTEL-SUNRISE-PCH/EMRTY", sunrise)
}.Run(t, "INTEL-SUNRISE-PCH/EMRTY")
}

13
util/intelp2m/platforms/snr/template.go
View file

@ -2,14 +2,11 @@ package snr
import "review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
// Group: "GPP_A", "GPP_B", "GPP_F", "GPP_C", "GPP_D", "GPP_E", "GPD", "GPP_I", "GPP_J",
// "GPP_K", "GPP_G", "GPP_H", "GPP_L"
// KeywordCheck - This function is used to filter parsed lines of the configuration file and
// returns true if the keyword is contained in the line.
// line : string from the configuration file
// Returns false if no word was found, or true otherwise
func (PlatformSpecific) KeywordCheck(line string) bool {
// CheckKeyword() parses lines of the configuration file and returns true if the keyword is
// contained in the line
// "GPP_A", "GPP_B", "GPP_F", "GPP_C", "GPP_D", "GPP_E", "GPD", "GPP_I", "GPP_J",
// "GPP_K", "GPP_G", "GPP_H", "GPP_L"
func CheckKeyword(line string) bool {
included, _ := common.KeywordsCheck(line, "GPP_", "GPD")
return included
}

46
util/intelp2m/platforms/test/suite.go
View file

@ -5,6 +5,9 @@ import (
"testing"
"review.coreboot.org/coreboot.git/util/intelp2m/config/p2m"
"review.coreboot.org/coreboot.git/util/intelp2m/fields"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
)
type (
@ -12,7 +15,7 @@ type (
ID string
DW0 uint32
DW1 uint32
Ownership uint8
Ownership bool
}
Macro struct {
Short string
@ -22,43 +25,60 @@ type (
Pad
Macro
}
PlatformSpecificIf interface {
GenMacro(string, uint32, uint32, uint8) string
}
Suite []TestCase
)
func (p Pad) toShortMacro(platform PlatformSpecificIf) string {
func (p Pad) toShortMacro() string {
if err := p2m.SetFieldType("none"); err != nil {
panic(err)
}
p2m.Config.AutoCheck = false
return platform.GenMacro(p.ID, p.DW0, p.DW1, p.Ownership)
constructor, err := platforms.GetConstructor()
if err != nil {
panic(err)
}
macro := common.CreateFrom(
p.ID,
p.Ownership,
constructor(p.DW0, p.DW1),
fields.Get(),
)
return macro.Generate()
}
func (p Pad) toLongMacro(platform PlatformSpecificIf) string {
func (p Pad) toLongMacro() string {
if err := p2m.SetFieldType("cb"); err != nil {
panic(err)
}
p2m.Config.AutoCheck = true
return platform.GenMacro(p.ID, p.DW0, p.DW1, p.Ownership)
constructor, err := platforms.GetConstructor()
if err != nil {
panic(err)
}
macro := common.CreateFrom(
p.ID,
p.Ownership,
constructor(p.DW0, p.DW1),
fields.Get(),
)
return macro.Generate()
}
func (m *Macro) checkFor(platform PlatformSpecificIf, pad Pad) error {
func (m *Macro) check(pad Pad) error {
var format string = "%s macro\nExpects: '%s'\nActually: '%s'\n\n"
if actually := pad.toLongMacro(platform); m.Long != "" && m.Long != actually {
if actually := pad.toLongMacro(); m.Long != "" && m.Long != actually {
return fmt.Errorf(format, "LONG", m.Long, actually)
}
if actually := pad.toShortMacro(platform); m.Short != "" && m.Short != actually {
if actually := pad.toShortMacro(); m.Short != "" && m.Short != actually {
return fmt.Errorf(format, "SHORT", m.Short, actually)
}
return nil
}
func (suite Suite) Run(t *testing.T, label string, platform PlatformSpecificIf) {
func (suite Suite) Run(t *testing.T, label string) {
t.Run(label, func(t *testing.T) {
for _, testcase := range suite {
if err := testcase.Macro.checkFor(platform, testcase.Pad); err != nil {
if err := testcase.Macro.check(testcase.Pad); err != nil {
t.Errorf("Test failed for pad %s\n%v", testcase.Pad.ID, err)
}
}

109
util/intelp2m/platforms/tgl/macro.go
View file

@ -1,113 +1,56 @@
package tgl
import (
"fmt"
"strings"
"review.coreboot.org/coreboot.git/util/intelp2m/fields"
"review.coreboot.org/coreboot.git/util/intelp2m/logs"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/cnl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common/register/bits"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/snr"
)
const (
PAD_CFG_DW0_RO_FIELDS = (0x1 << 27) | (0x1 << 24) | (0x3 << 21) | (0xf << 16) | 0xfc
PAD_CFG_DW1_RO_FIELDS = 0xfdffc3ff
DW0Mask = (0b1 << 27) | (0b1 << 24) | (0b11 << 21) | (0b1111 << 16) | 0b11111100
DW1Mask = 0b11111101111111111100001111111111
)
type InheritanceMacro interface {
Pull()
GpiMacroAdd()
GpoMacroAdd()
NativeFunctionMacroAdd()
NoConnMacroAdd()
type BasePlatform struct {
// based on the Cannon Lake platform
cnl.BasePlatform
}
type PlatformSpecific struct {
InheritanceMacro
func InitBasePlatform(dw0, dw0mask uint32, dw1, dw1mask uint32) BasePlatform {
return BasePlatform{cnl.InitBasePlatform(dw0, dw0mask, dw1, dw1mask)}
}
// RemmapRstSrc - remmap Pad Reset Source Config
func (PlatformSpecific) RemmapRstSrc() {
macro := common.GetMacro()
if strings.Contains(macro.PadIdGet(), "GPD") {
func GetPlatform(dw0, dw1 uint32) common.PlatformIf {
p := InitBasePlatform(dw0, DW0Mask, dw1, DW1Mask)
return &p
}
// Override BasePlatform.RemapRstSrc()
func (p *BasePlatform) RemapRstSrc(m *common.Macro) {
if strings.Contains(m.GetPadId(), "GPD") {
// See reset map for the TigerLake Community 2:
// https://github.com/coreboot/coreboot/blob/master/src/soc/intel/tigerlake/gpio.c#L21
// remmap is not required because it is the same as common.
return
}
dw0 := macro.GetRegisterDW0()
var remapping = map[uint32]uint32{
0: bits.RstCfgRSMRST << bits.DW0PadRstCfg,
1: bits.RstCfgDEEP << bits.DW0PadRstCfg,
2: bits.RstCfgPLTRST << bits.DW0PadRstCfg,
remapping := map[uint32]uint32{
0b00: bits.RstCfgRSMRST << bits.DW0PadRstCfg,
0b01: bits.RstCfgDEEP << bits.DW0PadRstCfg,
0b10: bits.RstCfgPLTRST << bits.DW0PadRstCfg,
}
resetsrc, valid := remapping[dw0.GetResetConfig()]
dw0 := p.GetRegisterDW0()
source, valid := remapping[dw0.GetResetConfig()]
if valid {
// dw0.SetResetConfig(resetsrc)
ResetConfigFieldVal := (dw0.Value & 0x3fffffff) | remapping[dw0.GetResetConfig()]
dw0.Value = ResetConfigFieldVal
dw0.Value &= 0x3fffffff
dw0.Value |= source
} else {
fmt.Println("Invalid Pad Reset Config [ 0x", resetsrc, " ] for ", macro.PadIdGet())
logs.Errorf("%s: skip re-mapping: DW0 %s: invalid reset config source value 0b%b",
m.GetPadId(), dw0, dw0.GetResetConfig())
}
mask := bits.DW0[bits.DW0PadRstCfg]
dw0.CntrMaskFieldsClear(mask)
}
// Adds The Pad Termination (TERM) parameter from PAD_CFG_DW1 to the macro
// as a new argument
func (platform PlatformSpecific) Pull() {
platform.InheritanceMacro.Pull()
}
// Adds PAD_CFG_GPI macro with arguments
func (platform PlatformSpecific) GpiMacroAdd() {
platform.InheritanceMacro.GpiMacroAdd()
}
// Adds PAD_CFG_GPO macro with arguments
func (platform PlatformSpecific) GpoMacroAdd() {
platform.InheritanceMacro.GpoMacroAdd()
}
// Adds PAD_CFG_NF macro with arguments
func (platform PlatformSpecific) NativeFunctionMacroAdd() {
platform.InheritanceMacro.NativeFunctionMacroAdd()
}
// Adds PAD_NC macro
func (platform PlatformSpecific) NoConnMacroAdd() {
platform.InheritanceMacro.NoConnMacroAdd()
}
// GenMacro - generate pad macro
// dw0 : DW0 config register value
// dw1 : DW1 config register value
// return: string of macro
func (PlatformSpecific) GenMacro(id string, dw0Val, dw1Val uint32, ownership uint8) string {
macro := common.GetInstanceMacro(
PlatformSpecific{
InheritanceMacro: cnl.PlatformSpecific{
InheritanceMacro: snr.PlatformSpecific{},
},
},
fields.InterfaceGet(),
)
macro.Clear()
dw0 := macro.GetRegisterDW0()
dw0.CntrMaskFieldsClear(bits.All32)
dw1 := macro.GetRegisterDW1()
dw1.CntrMaskFieldsClear(bits.All32)
dw0.Value = dw0Val
dw1.Value = dw1Val
dw0.ReadOnly = PAD_CFG_DW0_RO_FIELDS
dw1.ReadOnly = PAD_CFG_DW1_RO_FIELDS
macro.PadIdSet(id).SetPadOwnership(ownership)
return macro.Generate()
}

4
util/intelp2m/platforms/tgl/template.go
View file

@ -5,10 +5,10 @@ import "review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
// Group : "GPP_A", "GPP_R", "GPP_B", "GPP_D", "GPP_C", "GPP_S", "GPP_G", "GPD", "GPP_E",
// "GPP_F", "GPP_H", "GPP_J", "GPP_K", "GPP_I", "VGPIO_USB", "VGPIO_PCIE"
// KeywordCheck - This function is used to filter parsed lines of the configuration file
// CheckKeyword - This function is used to filter parsed lines of the configuration file
// and returns true if the keyword is contained in the line.
// line : string from the configuration file
func (PlatformSpecific) KeywordCheck(line string) bool {
func CheckKeyword(line string) bool {
isIncluded, _ := common.KeywordsCheck(line, "GPP_", "GPD", "VGPIO")
return isIncluded
}

45
util/intelp2m/platforms/tgl/tgl_test.go
View file

@ -3,108 +3,107 @@ package tgl_test
import (
"testing"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/cnl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/snr"
"review.coreboot.org/coreboot.git/util/intelp2m/config/p2m"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/test"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/tgl"
)
func TestGenMacro(t *testing.T) {
tigerlake := tgl.PlatformSpecific{
InheritanceMacro: cnl.PlatformSpecific{
InheritanceMacro: snr.PlatformSpecific{},
},
}
p2m.Config.Platform = p2m.Tiger
test.Suite{
{
Pad: test.Pad{ID: "GPP_A1", DW0: 0x11111111, DW1: 0x11111111, Ownership: 1},
Pad: test.Pad{ID: "GPP_A1", DW0: 0x11111111, DW1: 0x11111111, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_A1, DN_20K, RSMRST, NF4),",
Long: "_PAD_CFG_STRUCT(GPP_A1, PAD_FUNC(NF4) | PAD_RESET(RSMRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE) | (1 << 28) | 1, PAD_PULL(DN_20K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(DISPUPD) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_R2", DW0: 0x22222222, DW1: 0x22222222, Ownership: 0},
Pad: test.Pad{ID: "GPP_R2", DW0: 0x22222222, DW1: 0x22222222, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_TERM_GPO(GPP_R2, 0, INVALID, RSMRST),",
Long: "_PAD_CFG_STRUCT(GPP_R2, PAD_FUNC(GPIO) | PAD_RESET(RSMRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(RX_DISABLE) | (1 << 29) | (1 << 1), PAD_CFG1_TOL_1V8PAD_PULL(INVALID) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(ENPD)),",
},
},
{
Pad: test.Pad{ID: "GPP_B3", DW0: 0x44444444, DW1: 0x44444444, Ownership: 1},
Pad: test.Pad{ID: "GPP_B3", DW0: 0x44444444, DW1: 0x44444444, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_B3, INVALID, DEEP, NF1),",
Long: "_PAD_CFG_STRUCT(GPP_B3, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_IRQ_ROUTE(SMI), PAD_PULL(INVALID) | PAD_IOSSTATE(Tx0RxDCRx0) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_D4", DW0: 0x88888888, DW1: 0x88888888, Ownership: 0},
Pad: test.Pad{ID: "GPP_D4", DW0: 0x88888888, DW1: 0x88888888, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_D4, DN_5K, PLTRST, NF2),",
Long: "_PAD_CFG_STRUCT(GPP_D4, PAD_FUNC(NF2) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT), PAD_PULL(DN_5K) | PAD_IOSSTATE(Tx0RxDCRx1)),",
},
},
}.Run(t, "INTEL-TIGER-LAKE-PCH/SLIDING-ONE-IN-NIBBLE-TEST", tigerlake)
}.Run(t, "INTEL-TIGER-LAKE-PCH/SLIDING-ONE-IN-NIBBLE-TEST")
test.Suite{
{
Pad: test.Pad{ID: "GPP_C5", DW0: 0xEEEEEEEE, DW1: 0xEEEEEEEE, Ownership: 1},
Pad: test.Pad{ID: "GPP_C5", DW0: 0xEEEEEEEE, DW1: 0xEEEEEEEE, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_C5, UP_2K, RSMRST, NF3),",
Long: "_PAD_CFG_STRUCT(GPP_C5, PAD_FUNC(NF3) | PAD_RESET(RSMRST) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_RX_POL(INVERT) | PAD_BUF(RX_DISABLE) | (1 << 29) | (1 << 1), PAD_CFG1_TOL_1V8PAD_PULL(UP_2K) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPD) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_S6", DW0: 0xDDDDDDDD, DW1: 0xDDDDDDDD, Ownership: 0},
Pad: test.Pad{ID: "GPP_S6", DW0: 0xDDDDDDDD, DW1: 0xDDDDDDDD, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_S6, INVALID, RSMRST, NF7),",
Long: "_PAD_CFG_STRUCT(GPP_S6, PAD_FUNC(NF7) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 28) | 1, PAD_PULL(INVALID) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(DISPUPD)),",
},
},
{
Pad: test.Pad{ID: "GPP_G7", DW0: 0xBBBBBBBB, DW1: 0xBBBBBBBB, Ownership: 1},
Pad: test.Pad{ID: "GPP_G7", DW0: 0xBBBBBBBB, DW1: 0xBBBBBBBB, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_G7, INVALID, PLTRST, NF6),",
Long: "_PAD_CFG_STRUCT(GPP_G7, PAD_FUNC(NF6) | PAD_RESET(PLTRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(NMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(INVALID) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPU) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPD8", DW0: 0x77777777, DW1: 0x77777777, Ownership: 0},
Pad: test.Pad{ID: "GPD8", DW0: 0x77777777, DW1: 0x77777777, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPD8, UP_667, DEEP, NF5),",
Long: "_PAD_CFG_STRUCT(GPD8, PAD_FUNC(NF5) | PAD_RESET(DEEP) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(UP_667) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPU)),",
},
},
}.Run(t, "INTEL-TIGER-LAKE-PCH/SLIDING-ZERO-IN-NIBBLE-TEST", tigerlake)
}.Run(t, "INTEL-TIGER-LAKE-PCH/SLIDING-ZERO-IN-NIBBLE-TEST")
test.Suite{
{
Pad: test.Pad{ID: "GPP_E9", DW0: 0x33333333, DW1: 0x33333333, Ownership: 1},
Pad: test.Pad{ID: "GPP_E9", DW0: 0x33333333, DW1: 0x33333333, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_E9, UP_20K, RSMRST, NF4),",
Long: "_PAD_CFG_STRUCT(GPP_E9, PAD_FUNC(NF4) | PAD_RESET(RSMRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(UP_20K) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPU) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_F10", DW0: 0x66666666, DW1: 0x66666666, Ownership: 0},
Pad: test.Pad{ID: "GPP_F10", DW0: 0x66666666, DW1: 0x66666666, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF_1V8(GPP_F10, UP_1K, DEEP, NF1),",
Long: "_PAD_CFG_STRUCT(GPP_F10, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(RX_DISABLE) | (1 << 29) | (1 << 1), PAD_CFG1_TOL_1V8PAD_PULL(UP_1K) | PAD_IOSSTATE(TxDRxE) | PAD_IOSTERM(ENPD)),",
},
},
{
Pad: test.Pad{ID: "GPP_H11", DW0: 0xCCCCCCCC, DW1: 0xCCCCCCCC, Ownership: 1},
Pad: test.Pad{ID: "GPP_H11", DW0: 0xCCCCCCCC, DW1: 0xCCCCCCCC, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_H11, INVALID, RSMRST, NF3),",
Long: "_PAD_CFG_STRUCT(GPP_H11, PAD_FUNC(NF3) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_RX_POL(INVERT), PAD_PULL(INVALID) | PAD_IOSSTATE(Tx1RxDCRx0) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPP_J12", DW0: 0x99999999, DW1: 0x99999999, Ownership: 0},
Pad: test.Pad{ID: "GPP_J12", DW0: 0x99999999, DW1: 0x99999999, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF(GPP_J12, INVALID, PLTRST, NF6),",
Long: "_PAD_CFG_STRUCT(GPP_J12, PAD_FUNC(NF6) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 28) | 1, PAD_PULL(INVALID) | PAD_IOSSTATE(Tx1RxE) | PAD_IOSTERM(DISPUPD)),",
},
},
}.Run(t, "INTEL-TIGER-LAKE-PCH/SLIDING-ONE-ONE-IN-NIBBLE-TEST", tigerlake)
}.Run(t, "INTEL-TIGER-LAKE-PCH/SLIDING-ONE-ONE-IN-NIBBLE-TEST")
}