mb/*/*/*.fmd: Start flash at 0

FMAP should not contain information about the memory map.

Done with the following command:
"find -name \*.fmd -exec sed -i 's/\(FLASH\).* \(.*\) /\1 \2 /' {} \;"

for AMD:
All addresses that amdfwtool expects as command line parameter have the
ADDR_REL_BIOS (flash address) address_mode setting. One exception is
the *_FW_A_POSITION and *_FW_B_POSITION addresses. But amdfwtool checks
if memory or flash addresses are passed and converts accordingly. So
changing the address from memory -> flash doesn't matter for the
resulting binary.
Since commit 41a162b7a8 ("soc/amd/phoenix/Makefile.inc: Pass APOB_NV
address as offset") and therefore since phoenix SOC, APOB_NV is passed
as flash offset. But before that the memory ABL always assumed a MMIO
address (no matter the address_mode) so we need to add a little quirk
for that.

tested: boot glinda based mainboard and also check that memory training
is still cached successfully in APOB_NV.

Change-Id: Iac86ef9be6b14817a65bf3a7ccb624d205ca3f99
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63771
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
This commit is contained in:
Arthur Heymans 2022-04-22 02:01:42 +02:00 committed by Matt DeVillier
commit a7eb390796
154 changed files with 199 additions and 180 deletions

View file

@ -1096,7 +1096,6 @@ endif # ifeq($(CONFIG_HAVE_IFD_BIN),y)
endif # ifneq($(CONFIG_IFD_CHIPSET),)
# entire flash
FMAP_ROM_ADDR := $(call int-subtract, 0x100000000 $(CONFIG_ROM_SIZE))
FMAP_ROM_SIZE := $(CONFIG_ROM_SIZE)
# entire "BIOS" region (everything directly of concern to the host system)
# relative to ROM_BASE
@ -1185,7 +1184,6 @@ else # ifeq ($(CONFIG_ARCH_X86),y)
DEFAULT_FLASHMAP:=$(top)/util/cbfstool/default.fmd
# entire flash
FMAP_ROM_ADDR := 0
FMAP_ROM_SIZE := $(CONFIG_ROM_SIZE)
# entire "BIOS" region (everything directly of concern to the host system)
# relative to ROM_BASE
@ -1233,8 +1231,7 @@ FMAP_CBFS_SIZE := $(call int-subtract,$(FMAP_BIOS_SIZE) $(FMAP_CBFS_BASE))
endif # ifeq ($(CONFIG_ARCH_X86),y)
$(obj)/fmap.fmd: $(top)/Makefile.mk $(DEFAULT_FLASHMAP) $(obj)/config.h
sed -e "s,##ROM_BASE##,$(FMAP_ROM_ADDR)," \
-e "s,##ROM_SIZE##,$(FMAP_ROM_SIZE)," \
sed -e "s,##ROM_SIZE##,$(FMAP_ROM_SIZE)," \
-e "s,##BIOS_BASE##,$(FMAP_BIOS_BASE)," \
-e "s,##BIOS_SIZE##,$(FMAP_BIOS_SIZE)," \
-e "s,##FMAP_BASE##,$(FMAP_FMAP_BASE)," \

View file

@ -93,7 +93,7 @@ tryharder:
check_for_exit:
/* if addr <= COREBOOT_END - 1, continue */
#define FMAP_SECTION_COREBOOT_END (FMAP_SECTION_COREBOOT_START - 1 + FMAP_SECTION_COREBOOT_SIZE)
#define FMAP_SECTION_COREBOOT_END (COREBOOT_CBFS_START - 1 + FMAP_SECTION_COREBOOT_SIZE)
movl $FMAP_SECTION_COREBOOT_END, %ecx
cmp %ecx, %ebx

View file

@ -1,4 +1,4 @@
FLASH@0xFF000000 16M {
FLASH 16M {
BIOS {
RW_MRC_CACHE 64K
COREBOOT(CBFS)

View file

@ -1,4 +1,4 @@
FLASH@0xFF000000 16M {
FLASH 16M {
BIOS {
EC_SIG 4K
FMAP 4K

View file

@ -1,4 +1,4 @@
FLASH@0xFF000000 16M {
FLASH 16M {
BIOS {
EC_SIG 4K
FMAP 4K

View file

@ -1,4 +1,4 @@
FLASH@0xFF000000 16M {
FLASH 16M {
SI_BIOS {
WP_RO 8M {
EC_SIG 4K

View file

@ -1,4 +1,4 @@
FLASH@0xFF000000 16M {
FLASH 16M {
SI_BIOS {
WP_RO 8M {
EC_SIG 4K

View file

@ -1,4 +1,4 @@
FLASH@0xFF000000 16M {
FLASH 16M {
BIOS {
EC_SIG 4K
FMAP 4K

View file

@ -1,4 +1,4 @@
FLASH@0xFF000000 16M {
FLASH 16M {
SI_BIOS {
WP_RO 8M {
EC_SIG 4K

View file

@ -1,4 +1,4 @@
FLASH@0xFF000000 16M {
FLASH 16M {
SI_BIOS {
WP_RO 8M {
EC_SIG 4K

View file

@ -1,4 +1,4 @@
FLASH@0xFF000000 16M {
FLASH 16M {
BIOS {
EC 4K
RW_MRC_CACHE 120K

View file

@ -1,4 +1,4 @@
FLASH@0xFF000000 16M {
FLASH 16M {
SI_BIOS {
EC 4K
RW_MRC_CACHE(PRESERVE) 120K

View file

@ -1,4 +1,4 @@
FLASH@0xFF000000 16M {
FLASH 16M {
BIOS {
EC_SIG 4K
FMAP 4K

View file

@ -1,4 +1,4 @@
FLASH@0xFF000000 16M {
FLASH 16M {
SI_BIOS {
WP_RO 8M {
EC_SIG 4K

View file

@ -1,4 +1,4 @@
FLASH@0xFF000000 16M {
FLASH 16M {
BIOS {
EC 128K
RW_MRC_CACHE 64K

View file

@ -1,4 +1,4 @@
FLASH@0xFF000000 16M {
FLASH 16M {
SI_BIOS {
EC 128K
RW_MRC_CACHE(PRESERVE) 64K

View file

@ -1,4 +1,4 @@
FLASH@0xFF000000 16M {
FLASH 16M {
BIOS {
EC 128K
RW_MRC_CACHE 64K

View file

@ -1,4 +1,4 @@
FLASH@0xFF800000 8M {
FLASH 8M {
BIOS {
EC 128K
RW_MRC_CACHE 64K

View file

@ -1,4 +1,4 @@
FLASH@0xFF000000 16M {
FLASH 16M {
BIOS {
EC 4K
FMAP 4K

View file

@ -1,4 +1,4 @@
FLASH@0xFF000000 16M {
FLASH 16M {
SI_BIOS {
WP_RO 8M {
EC 4K

View file

@ -1,4 +1,4 @@
FLASH@0x08000000 CONFIG_ROM_SIZE {
FLASH CONFIG_ROM_SIZE {
BIOS@0x0 CONFIG_ROM_SIZE {

View file

@ -1,4 +1,4 @@
FLASH@0xfc000000 64M {
FLASH 64M {
SI_ALL@0x0 0x03000000 {
SI_DESC@0x0 0x1000
SI_GBE@0x1000 0x2000

View file

@ -1,4 +1,4 @@
FLASH@0x0 8M {
FLASH 8M {
WP_RO@0x0 0x800000 {
RO_SECTION@0x0 0x7fc000 {
# 0 - 0x10000 is free for firmware usage.

View file

@ -1,4 +1,4 @@
FLASH@0xff800000 0x800000 {
FLASH 0x800000 {
SI_BIOS 0x800000 {
RW_SECTION_A 0x3c0000 {
VBLOCK_A 0x10000

View file

@ -1,4 +1,4 @@
FLASH@0xff800000 0x800000 {
FLASH 0x800000 {
SI_BIOS 0x800000 {
RW_SECTION_A 0x3c0000 {
VBLOCK_A 0x10000

View file

@ -1,4 +1,4 @@
FLASH@0xff800000 0x800000 {
FLASH 0x800000 {
SI_BIOS 0x800000 {
RW_SECTION_A 0x1c0000 {
VBLOCK_A 0x10000

View file

@ -12,7 +12,7 @@
# +-------------+ <-- ROM_SIZE
#
FLASH@0x10000000 CONFIG_ROM_SIZE {
FLASH CONFIG_ROM_SIZE {
BIOS {

View file

@ -1,4 +1,4 @@
FLASH@0xff800000 8M {
FLASH 8M {
SI_BIOS@0x200000 0x600000 {
MISC_RW@0x0 0x0a000 {
RW_MRC_CACHE@0x0 0x08000

View file

@ -1,4 +1,4 @@
FLASH@0xFF000000 32M {
FLASH 32M {
BIOS_PAGE_1 16M {
FMAP 4K
COREBOOT(CBFS)

View file

@ -10,7 +10,7 @@
# instead of a group section; otherwise the preserved data may be wrong if you
# resize or reorder sections inside a group.
FLASH@0x0 8M {
FLASH 8M {
WP_RO@0x0 4M {
RO_SECTION {
BOOTBLOCK 128K

View file

@ -1,4 +1,4 @@
FLASH@0xff800000 0x800000 {
FLASH 0x800000 {
SI_ALL@0x0 0x200000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x1ff000

View file

@ -1,4 +1,4 @@
FLASH@0xff800000 0x800000 {
FLASH 0x800000 {
SI_ALL@0x0 0x200000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x1ff000

View file

@ -1,4 +1,4 @@
FLASH@0xff800000 0x800000 {
FLASH 0x800000 {
SI_ALL@0x0 0x200000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x1ff000

View file

@ -10,7 +10,7 @@
# instead of a group section; otherwise the preserved data may be wrong if you
# resize or reorder sections inside a group.
FLASH@0x0 8M {
FLASH 8M {
WP_RO@0x0 4M {
RO_SECTION {
BOOTBLOCK 128K

View file

@ -10,7 +10,7 @@
# instead of a group section; otherwise the preserved data may be wrong if you
# resize or reorder sections inside a group.
FLASH@0x0 8M {
FLASH 8M {
WP_RO@0x0 4M {
RO_SECTION {
BOOTBLOCK 128K

View file

@ -1,4 +1,4 @@
FLASH@0xff800000 0x800000 {
FLASH 0x800000 {
SI_ALL@0x0 0x200000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x1ff000

View file

@ -1,4 +1,4 @@
FLASH@0x0 0x400000 {
FLASH 0x400000 {
WP_RO@0x0 0x200000 {
RO_SECTION@0x0 0x1f0000 {
BOOTBLOCK@0 128K

View file

@ -1,4 +1,4 @@
FLASH@0xff000000 0x1000000 {
FLASH 0x1000000 {
SI_ALL@0x0 0x381000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x380000

View file

@ -1,4 +1,4 @@
FLASH@0xfe000000 0x2000000 {
FLASH 0x2000000 {
SI_ALL@0x0 0x500000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x4ff000

View file

@ -1,4 +1,4 @@
FLASH@0xfe000000 0x2000000 {
FLASH 0x2000000 {
SI_ALL@0x0 0x438000 {
SI_DESC@0x0 0x1000
SI_EC@0x1000 0x100000

View file

@ -1,4 +1,4 @@
FLASH@0xfe000000 0x2000000 {
FLASH 0x2000000 {
SI_BIOS@0x400000 {
MEMORY_MAPPED@0xc00000 { /* 16MiB total */
RW_MRC_CACHE 0x10000

View file

@ -1,4 +1,4 @@
FLASH@0xff000000 0x1000000 {
FLASH 0x1000000 {
SI_ALL@0x0 0x200000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x1ff000

View file

@ -1,4 +1,4 @@
FLASH@0xff000000 0x1000000 {
FLASH 0x1000000 {
SI_ALL@0x0 0x200000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x1ff000

View file

@ -1,4 +1,4 @@
FLASH@0x0 0x400000 {
FLASH 0x400000 {
WP_RO@0x0 0x300000 {
RO_SECTION@0x0 0x2f0000 {
BOOTBLOCK@0 128K

View file

@ -1,4 +1,4 @@
FLASH@0x0 0x800000 {
FLASH 0x800000 {
WP_RO@0x0 0x400000 {
RO_SECTION@0x0 0x3e0000 {
BOOTBLOCK@0 128K

View file

@ -10,7 +10,7 @@
# instead of a group section; otherwise the preserved data may be wrong if you
# resize or reorder sections inside a group.
FLASH@0x0 8M {
FLASH 8M {
WP_RO@0x0 4M {
RO_SECTION {
BOOTBLOCK 128K

View file

@ -1,4 +1,4 @@
FLASH@0xff000000 0x1000000 {
FLASH 0x1000000 {
SI_ALL@0x0 0x200000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x1ff000

View file

@ -1,4 +1,4 @@
FLASH@0x0 0x800000 {
FLASH 0x800000 {
WP_RO@0x0 0x400000 {
RO_SECTION@0x0 0x3e0000 {
BOOTBLOCK@0 128K

View file

@ -1,4 +1,4 @@
FLASH@0xFF000000 16M {
FLASH 16M {
SI_BIOS {
RW_MRC_CACHE(PRESERVE) 64K
RW_SECTION_A 3M {

View file

@ -1,4 +1,4 @@
FLASH@0xff000000 0x1000000 {
FLASH 0x1000000 {
SI_ALL@0x0 0x400000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x3ff000

View file

@ -1,4 +1,4 @@
FLASH@0xfe000000 0x2000000 {
FLASH 0x2000000 {
SI_ALL@0x0 0x400000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x3ff000

View file

@ -3,9 +3,9 @@
# TODO: update for Herobrine
#if CONFIG_BOARD_GOOGLE_PIGLIN || CONFIG_BOARD_GOOGLE_HOGLIN
FLASH@0x0 CONFIG_ROM_SIZE {
FLASH CONFIG_ROM_SIZE {
#else
FLASH@0x0 8M {
FLASH 8M {
#endif
WP_RO 4M {
RO_SECTION 0x3c4000 {

View file

@ -1,4 +1,4 @@
FLASH@0xff800000 0x800000 {
FLASH 0x800000 {
SI_ALL@0x0 0x200000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x1ff000

View file

@ -1,4 +1,4 @@
FLASH@0xFF000000 0x1000000 {
FLASH 0x1000000 {
SI_BIOS@0x0 0x1000000 {
UNIFIED_MRC_CACHE@0x0 0x21000 {
RW_MRC_CACHE@0x0 0x10000

View file

@ -10,7 +10,7 @@
# instead of a group section; otherwise the preserved data may be wrong if you
# resize or reorder sections inside a group.
FLASH@0x0 8M {
FLASH 8M {
WP_RO@0x0 4M {
RO_SECTION {
BOOTBLOCK 128K

View file

@ -1,4 +1,4 @@
FLASH@0xff800000 0x800000 {
FLASH 0x800000 {
SI_ALL@0x0 0x200000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x1ff000

View file

@ -1,6 +1,6 @@
## SPDX-License-Identifier: GPL-2.0-only
FLASH@0x0 8M {
FLASH 8M {
WP_RO 4M {
RO_SECTION 0x204000 {
BOOTBLOCK 128K

View file

@ -1,5 +1,5 @@
# TODO(b/276944900): Update for 32 MB support, evaluate WP_RO size
FLASH@0xFF000000 16M {
FLASH 16M {
SI_BIOS {
WP_RO 4M {
RO_GSCVD 8K

View file

@ -1,4 +1,4 @@
FLASH@0x0 0x400000 {
FLASH 0x400000 {
WP_RO@0x0 0x200000 {
RO_SECTION@0x0 0x1f0000 {
BOOTBLOCK@0 128K

View file

@ -1,4 +1,4 @@
FLASH@0x0 0x400000 {
FLASH 0x400000 {
WP_RO@0x0 0x200000 {
RO_SECTION@0x0 0x1f0000 {
BOOTBLOCK@0 128K

View file

@ -1,4 +1,4 @@
FLASH@0x0 0x400000 {
FLASH 0x400000 {
WP_RO@0x0 0x200000 {
RO_SECTION@0x0 0x1f0000 {
BOOTBLOCK@0 128K

View file

@ -1,4 +1,4 @@
FLASH@0x0 0x400000 {
FLASH 0x400000 {
WP_RO@0x0 0x200000 {
RO_SECTION@0x0 0x1f0000 {
BOOTBLOCK@0 128K

View file

@ -1,4 +1,4 @@
FLASH@0xff800000 0x800000 {
FLASH 0x800000 {
SI_ALL@0x0 0x200000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x1ff000

View file

@ -1,4 +1,4 @@
FLASH@0x0 0x400000 {
FLASH 0x400000 {
WP_RO@0x0 0x200000 {
RO_SECTION@0x0 0x1f0000 {
BOOTBLOCK@0 128K

View file

@ -1,4 +1,4 @@
FLASH@0xff000000 0x1000000 {
FLASH 0x1000000 {
SI_ALL@0x0 0x200000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x1ff000

View file

@ -1,4 +1,4 @@
FLASH@0xff000000 0x1000000 {
FLASH 0x1000000 {
SI_ALL@0x0 0x300000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x2ff000

View file

@ -1,4 +1,4 @@
FLASH@0xfe000000 0x2000000 {
FLASH 0x2000000 {
SI_ALL@0x0 0x300000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x2ff000

View file

@ -1,4 +1,4 @@
FLASH@0xff800000 0x800000 {
FLASH 0x800000 {
SI_ALL@0x0 0x200000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x1ff000

View file

@ -10,7 +10,7 @@
# instead of a group section; otherwise the preserved data may be wrong if you
# resize or reorder sections inside a group.
FLASH@0x0 8M {
FLASH 8M {
WP_RO@0x0 4M {
RO_SECTION {
BOOTBLOCK 128K

View file

@ -1,4 +1,4 @@
FLASH@0xfe000000 0x2000000 {
FLASH 0x2000000 {
SI_ALL@0x0 0x400000 {
SI_DESC@0x0 0x1000
SI_EC@0x1000 0x100000

View file

@ -1,4 +1,4 @@
FLASH@0xfe000000 0x2000000 {
FLASH 0x2000000 {
SI_BIOS@0x400000 {
MEMORY_MAPPED@0xc00000 { /* 16MiB total */
RW_MRC_CACHE 0x10000

View file

@ -1,4 +1,4 @@
FLASH@0xFF000000 16M {
FLASH 16M {
SI_BIOS {
RW_MRC_CACHE(PRESERVE) 120K
RW_SECTION_A 3M {

View file

@ -10,7 +10,7 @@
# instead of a group section; otherwise the preserved data may be wrong if you
# resize or reorder sections inside a group.
FLASH@0x0 8M {
FLASH 8M {
WP_RO@0x0 4M {
RO_SECTION {
BOOTBLOCK 128K

View file

@ -1,4 +1,4 @@
FLASH@0xff800000 0x800000 {
FLASH 0x800000 {
SI_ALL@0x0 0x200000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x1ff000

View file

@ -1,4 +1,4 @@
FLASH@0x0 0x1000000 {
FLASH 0x1000000 {
WP_RO@0x0 0x500000 {
RO_SECTION@0x0 0x4f0000 {
BOOTBLOCK@0 128K

View file

@ -1,4 +1,4 @@
FLASH@0x0 0x800000 {
FLASH 0x800000 {
WP_RO@0x0 0x400000 {
RO_SECTION@0x0 0x3e0000 {
BOOTBLOCK@0 128K

View file

@ -1,4 +1,4 @@
FLASH@0xff800000 0x800000 {
FLASH 0x800000 {
SI_ALL@0x0 0x200000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x1ff000

View file

@ -1,6 +1,6 @@
## SPDX-License-Identifier: GPL-2.0-only
FLASH@0x0 8M {
FLASH 8M {
WP_RO 4M {
RO_SECTION 0x3e4000 {
BOOTBLOCK 96K

View file

@ -1,4 +1,4 @@
FLASH@0x0 0x400000 {
FLASH 0x400000 {
WP_RO@0x0 0x200000 {
RO_SECTION@0x0 0x1f0000 {
BOOTBLOCK@0 128K

View file

@ -1,4 +1,4 @@
FLASH@0x0 0x400000 {
FLASH 0x400000 {
WP_RO@0x0 0x200000 {
RO_SECTION@0x0 0x1f0000 {
BOOTBLOCK@0 128K

View file

@ -1,4 +1,4 @@
FLASH@0x0 0x400000 {
FLASH 0x400000 {
WP_RO@0x0 0x200000 {
RO_SECTION@0x0 0x1f0000 {
BOOTBLOCK@0 128K

View file

@ -1,4 +1,4 @@
FLASH@0xFF000000 16M {
FLASH 16M {
SI_BIOS {
RW_MRC_CACHE(PRESERVE) 64K
RW_SECTION_A 3M {

View file

@ -1,4 +1,4 @@
FLASH@0xfc000000 64M {
FLASH 64M {
SI_ALL@0x0 0x03000000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x2fff000

View file

@ -1,4 +1,4 @@
FLASH@0xfc000000 64M {
FLASH 64M {
SI_ALL 48M {
SI_DESC@0x0 0x1000
}

View file

@ -1,4 +1,4 @@
FLASH@0xff800000 0x800000 {
FLASH 0x800000 {
SI_ALL@0x0 0x180000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x17f000

View file

@ -1,4 +1,4 @@
FLASH@0xfc000000 64M {
FLASH 64M {
SI_ALL 48M {
SI_DESC@0x0 0x1000
}

View file

@ -1,4 +1,4 @@
FLASH@0xfc000000 64M {
FLASH 64M {
SI_ALL@0x0 0x2fe8000 {
SI_DESC@0x0 0x1000
SI_GBE@0x1000 0x2000

View file

@ -1,4 +1,4 @@
FLASH@0xff000000 0x1000000 {
FLASH 0x1000000 {
SI_ALL@0x0 0x380000 {
SI_DESC@0x0 0x1000
SI_EC@0x01000 0x80000

View file

@ -1,4 +1,4 @@
FLASH@0xfe000000 0x2000000 {
FLASH 0x2000000 {
SI_ALL@0x0 0x1081000 {
SI_DESC@0x0 0x1000
SI_EC@0x1000 0x80000

View file

@ -1,4 +1,4 @@
FLASH@0xfe000000 0x02000000 {
FLASH 0x02000000 {
BIOS@0x01400000 0x00C00000 {
RW_MRC_CACHE 0x10000
SMMSTORE 0x40000

View file

@ -1,4 +1,4 @@
FLASH@0xff000000 0x1000000 {
FLASH 0x1000000 {
SI_ALL@0x0 0x381000 {
SI_DESC@0x0 0x1000
SI_EC@0x1000 0x80000

View file

@ -1,4 +1,4 @@
FLASH@0xff000000 0x1000000 {
FLASH 0x1000000 {
SI_ALL@0x0 0x200000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x1ff000

View file

@ -1,4 +1,4 @@
FLASH@0xff000000 0x1000000 {
FLASH 0x1000000 {
SI_ALL@0x0 0x200000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x1ff000

View file

@ -1,4 +1,4 @@
FLASH@0xfe000000 0x2000000 {
FLASH 0x2000000 {
SI_ALL@0x0 0x1000000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0xfff000

View file

@ -1,4 +1,4 @@
FLASH@0xff800000 0x800000 {
FLASH 0x800000 {
SI_ALL@0x0 0x200000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x1ff000

View file

@ -1,4 +1,4 @@
FLASH@0xfe000000 0x2000000 {
FLASH 0x2000000 {
SI_ALL@0x0 0x1000000 {
SI_DESC@0x0 0x1000
SI_EC@0x1000 0x80000

View file

@ -1,4 +1,4 @@
FLASH@0xff800000 0x800000 {
FLASH 0x800000 {
SI_ALL@0x0 0x180000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x17f000

View file

@ -1,4 +1,4 @@
FLASH@0xff400000 0xc00000 {
FLASH 0xc00000 {
SI_ALL 0x20000 {
SI_DESC 0x1000
SI_GBE 0x2000

View file

@ -1,4 +1,4 @@
FLASH@0xff400000 0xc00000 {
FLASH 0xc00000 {
SI_ALL 0x500000 {
SI_DESC 0x1000
SI_GBE 0x2000

View file

@ -1,4 +1,4 @@
FLASH@0xff400000 0xc00000 {
FLASH 0xc00000 {
SI_ALL@0x0 0x500000 {
SI_DESC@0x0 0x1000
SI_GBE@0x1000 0x2000

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