The current QCOM fixup function qualcomm_find_hash() assumes only one
ELF will be loaded by the primary boot loader and the bootblock is one
of the segments of that ELF.
However, the primary boot loader for QCOM X1P42100 SoC loads multiple
ELFs for QC_SEC, TME Sequencer, TME FW and bootblock. This change
updates the fixup functionality to handle bootblock being a separate
ELF.
If the bootblock offset does not fit within the first ELF, then the
fixup function understands that it is a multi ELF.
Additionally, it ensures the bootblock ELF uses MBN v7 format.
BUG=b:420542130
TEST=1. Create a image.serial.bin and ensure it boots on X1P42100
2. Used the following script to verify the hash
#! /bin/bash
image=/build/bluey/firmware/image-bluey.serial.bin
bin=/tmp/bb.bin
seg=/tmp/bb.seg
hash=/tmp/bb.hash
#
# Bootblock is the final ELF of the multi ELF. Hopefully
# there is no other ELF in ${image}. Get the offset of the
# final ELF in ${image} and get it out
#
bb_offset=`od -Ad -w4 -tx4 ${image} | grep 464c457f | tail -1 | cut -f1 -d ' '`
dd if=${image} of=${bin} skip=1 bs=${bb_offset} &> /dev/null
#
# The last two segments of the bootblock ELF have the actual
# executable and the hash. 'LOAD' is the executable segment and
# the other is the hash segment. Get their offsets and convert
# to decimal.
#
offs=`readelf -lW ${bin} | tail -2 | awk '{print $1" "$2" "$5}'`
offs=(`printf "%s %u %u %s %u %u" ${offs}`)
#
# Get the executable and hash segments
#
if [ ${offs[0]} = "LOAD" ]; then
first=${seg}
second=${hash}
else
first=${hash}
second=${seg}
fi
dd if=${bin} skip=${offs[1]} bs=1 count=${offs[2]} of=${first} &> /dev/null
dd if=${bin} skip=${offs[4]} bs=1 count=${offs[5]} of=${second} &> /dev/null
#
# Find the SHA384 hash for the executable segment
#
sha=`sha384sum ${seg} | cut -f1 -d ' ' | sed 's/../& /g'`
echo ===================================================
echo Expected hash:
echo
echo ${sha} | fold -w48
echo ===================================================
echo
hexdump -C ${hash} | grep -A4 "`echo ${sha} | cut -f1-4 -d ' '`"
Change-Id: If57ba0cc9a4f08b69d7712f27c215339307e73d4
Signed-off-by: Varadarajan Narayanan <vnarayan@qualcomm.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88148
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
The PBL of QCOM X1P42100 SoC loads image in multi ELF format, which is
a concatenation of TME SEQ, TME FW, QC-SEC and Bootblock binaries.
This script stitches the binaries together into multi ELF image.
Usage: create_multielf.py [-h] -f IN_FILES [-o [OUT_FILE]]
Example: python create_multielf.py -f image1,image2,image3 -o output.bin
Change-Id: I9cdbdf6b5c62663491ccd7d42ab270742760aa0b
Signed-off-by: Sasirekaa Madhesu <smadhesu@qualcomm.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88145
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
The current approach has two problems:
- Just because the source address is 0 does not mean it is no
specifically set. A bunch of mainboards specify their APOB_NV base
address at 0 in their FMAP files.
- There is no AMD SOC that has support for this binary, but doesn't give
AMDFWTOOL the base address. It would also not work considering that
AMD common/block/apob code gets the region from the FMAP.
Therefore just remove the check since no mainboard will ever enter the
else branch.
tested: binary identical for at least 1 mainboard on each SOC
generation.
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: Ic85d6b25c95ab12dbcc72d17158591891dd04e97
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87292
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Create a new script to extract
- ELF header
- Program header table (PHT)
- A given segment number
- Hash table segment with type as NULL and p_flags as 0x02000000
from an ELF.
Usage:
```
elf_segment_extractor.py [--eh] [--pht] [--segment <index>] [--hashtable] <elf_file> <output_file>
```
BUG=b:419213272
TEST=Extract first segment alongwith ELF header and PHT.
TEST=Extract a segment with an index number.
TEST=Extract the last segment if index is 'N'.
TEST=Extract hash table segment alongwith ELF header and PHT.
e.g.
elf_segment_extractor.py --eh --pht --segment 0 cpucp.elf cpucp_meta
elf_segment_extractor.py --segment 0 cpucp.elf cpucp_meta
elf_segment_extractor.py --segment N cpucp.elf cpucp_meta
elf_segment_extractor.py --eh --pht --hashtable cpucp.elf cpucp_meta
Change-Id: I1ea58d0ca17ad66463ffe7345a27e91dc0d22d2f
Signed-off-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87888
Reviewed-by: Pranava Y N <pranavayn@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
GCC 15 added a new `unterminated-string-initialization` warning. Even
though crossgcc is still using GCC 14, some Linux distributions (e.g.
Arch Linux) already started shipping GCC 15. Given that coreboot uses
`-Werror` (warnings are errors), this new warning causes build errors
for things built using the host toolchain, such as utilities. In this
case, cbfstool is affected, which prevents building coreboot images.
The nonstring attribute is used to tell the compiler whether or not a
string is intentionally not null terminated. Since the attribute is
only included in GCC 15 for multidimensional character arrays (and even
later for clang) we need to check the GCC version before using the
attribute.
On GCC version prior to GCC 15 the nonstring attribute will not be used,
but that is not a problem since the unterminated-string-initialization
warning only exists since GCC 15. So you can still build on all GCC
versions as before. This way it also works if your host toolchain is GCC
15 (which builds commonlib code for cbfstool) and your coreboot cross
toolchain is GCC 14 (which builds commonlib code for coreboot).
Clang is a diffent matter. According to the documentation, the nonstring
attribute only exists in version 21 which is not yet released by LLVM.
TEST=Build qemu/Q35 successfully
Change-Id: I919d71cb2811e91869ba1ff493a0719ddcc86c36
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87825
Reviewed-by: Benjamin Doron <benjamin.doron00@gmail.com>
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
There are two regressions introduced by CB:87823.
1. If the specified repo path has a tailing slash, `submodule` becames a
empty variable due to `${submodule##*/}`, e.g.,
`./util/scripts/update_submodules -R 3rdparty/arm-trusted-firmware/`
2. CB:87823 uses `git submodule status | cut -d ' ' -f 3` to retrieve
all submodule paths. The script gets the wrong path if the format is
wrong, e.g.,
-26c572974bcf7255930b0e9a51da3144ed0104b5 3rdparty/amd_blobs
57ac3f74b34a3303f03deee264a1f2247c68008d 3rdparty/arm-trusted-firmware (v2.12.0-908-g57ac3f74b)
+5b7492979fc139efdfdc7f97ae53a2349798f160 3rdparty/cmocka (cmocka-1.1.5-263-g5b74929)
The script gets the empty path for 3rdparty/amd_blobs and get
cmocka-1.1.5-263-g5b74929 for 3rdparty/cmocka.
This patch fixes 1 by removing the tailing slash for the input directory
and fixes 2 by the below command.
`git submodule foreach 'echo ${sm_path}'|grep -v Entering`
Note that `smp_path` is an environment variable[1] set by
`git submodule` when travelling the submodule directory.
[1]: https://git-scm.com/docs/git-submodule
Change-Id: I0016f3a867e2b4594788d71a790ff9a938121da5
Signed-off-by: Yidi Lin <yidilin@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87972
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
It's common for coreboot commits to prefix the commit title with a
topic, which is often the path to the files or directories. So adjust
this commit title accordingly.
Change-Id: Ice267719a08b289b0d996fd20c993d616c812d00
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87824
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Currently building GMP with GCC 15 causes this error:
"configure: error: could not find a working compiler, see config.log
for details"
GCC 15 by default uses std=gnu23 but that causes the build of GMP to
fail. So hardcode it to always build GMP using std=gnu17.
Once GMP is fixed in their next release, we can remove this again.
source:
https://gmplib.org/list-archives/gmp-bugs/2024-November/005550.html
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I7813ff18e8e486bece503652af69de1db93958b2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87650
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Provide common functions for accessing CBMEM and coreboot table entries
instead of mapping them manually in each function. New functions return
a copy of requested region as a heap-allocated buffer thus avoiding a
need for aligned memory access.
Remove global variables wherever possible to make code easier to read
and to isolate responsibilities of functions.
Use CBMEM entries instead of coreboot table records directly, but
provide fallback for old systems in case the correcponding CBMEM entry
does not exist.
BUG=b:391874512
TEST=cbmem -l; cbmem -x; cbmem -r 434f4e53; cbmem -t; cbmem -a 1200
Change-Id: I89b371e27ab3840cfbbd44880c32383b77f65e5c
Signed-off-by: Jakub Czapiga <czapiga@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87417
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
If the `--help` argument is passed, print the usage and immediately
return. This avoids printing errors about 'invalid config,' which
users don't specify when getting the usage information, and potentially
printing the usage a second time before exiting.
Change-Id: I18bf154ff5177fa0e0aa6a41f0d71980fed7ce55
Signed-off-by: Benjamin Doron <benjamin.doron@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87869
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-by: Alicja Michalska <ahplka19@gmail.com>
There doesn't seem to be much reason to use absolute paths to the
submodules, other than that it's not needed to change to the original
directory.
In preparation for CB:87824, make use of relative paths and change to
the original directory at the start of each iteration.
Change-Id: Ic74b589d933e6acd882fb9a09461bf7c01952a6f
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87823
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
For better readability of the log output, add an empty line between each
iteration of the submodules.
Change-Id: I626b609e9833bffde0f7a5eb101877c6cd83a173
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87822
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
The commit f66c7c1037 ("util/abuild: Update echo to printf for
consistency") accidentally added whitespaces to the missing_arches
variable, causing the [[ -n "${missing_arches}" ]] check to fail.
The commit c81b08c4ba ("util/abuild: Fix building ChromeOS boards")
intended to fix it, but did it the wrong way.
Now, really fix the problem from the Makefile snippet that is causing
the whitespace issue.
Change-Id: I5e417e851840bad000492bf737fc8e25063fe0c4
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87809
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
The commit 49ae935b37 ("util/abuild: Change [...] to [[...]] for
consistency") [1] accidentally replaced "\>" with ">" in a grep pattern,
causing all boards to be considered not supporting ChromeOS.
The commit f66c7c1037 ("util/abuild: Update echo to printf for
consistency") [2] replaced
@echo $(foreach arch,$(REQUIRED_ARCHES),\
$(if $(filter $(arch),$(SUBARCH_SUPPORTED)),,$(arch)))
with
@printf "%s\n" "$(foreach arch,$(REQUIRED_ARCHES),\
$(if $(filter $(arch),$(SUBARCH_SUPPORTED)),,$(arch)))"
and caused an additional whitespace character to be printed when all
required archs are supported. The result of the `missing_arches` shell
variable would be " ", and hence the `[[ -n "$missing_arches" ]]` check
would be wrong. Fix this by using `-z`.
[1] CB:87367
[2] CB:87368
Change-Id: Ib77566e70ac8b3717f3b29433ce9ae0a1fc69cce
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87708
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub "Kuba" Czapiga <czapiga@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
In CB:87370 (util/abuild: Use ${} around variable names),
commit id: a2baaec067, some lines were unintentionally reordered.
This led to abuild not working as intended.
Change-Id: I0aced8dde475f7338e4670c11a9cd1ec4502d743
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87681
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Nuvoton NCT6779D has an undocumented GPIOE# functionality similar
to that found in NCT6791D. Its latched status can be read from
LDN B register 0xfb. Add it to the roster of dumped registers to
help development.
Change-Id: Id050b8efde855dec8099f1ac35307f7d372ae499
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87364
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Use an array instead of a variable as suggested by the TODO, so we can
remove the shellcheck disable and fix the warning.
Change-Id: I5e872ebe350f339b932a711fe7f6a68743f002ed
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87379
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Increment the version number for the current changes.
Change-Id: Iec94067e34292df3b85744a820ace4aa198a6322
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87378
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
This fixes the shellcheck warnings about declaring and using local
variables at the same time.
Change-Id: Ia16911c9ea0a1b32c3480a93ca0e53a409e80d22
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87373
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Shellcheck warns that the interrupt() function is unreachable, but it's
set to run on CTL-C. Disable the warning.
Change-Id: I0b850573964c732b1a3875dfdc7c1f0d406bac1a
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87371
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
While not always necessary, for consistency, use the ${} around all
variables.
Change-Id: I53fdddfd41e8aaa062bee73f441c5a816282c8ed
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87370
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Abuild used a mix of 'function funcname' and 'funcname()`. This
standardizes them all to use the 'funcname()' format. While they do
the same thing, we should be consistent across the file, and the
'funcname()' syntax is generally preferred.
Change-Id: I7530aa41b6413f0d5febe3d8a0db4a98113e1448
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87369
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Abuild used a mix of echo and printf. This updates them all to printf,
which is generally safer, especially when printing variable content
that might contain special characters or start with '-'.
Change-Id: Ib7f35fbaaffe8a85e2b9a1d7c0b8e04ffe0e9901
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87368
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
The [[...]] form is generally recommended as it's more robust and
handles edge cases better (e.g., word splitting, pathname expansion).
Change-Id: I74189c25f0e602a4359272033c6725494a0f487f
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87367
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Warn about allocation function calls with insufficient size for the
target type of the pointer.
commit 6ab188ee6c ("Makefile.mk: Use Walloc-size GCC option")
introduced this GCC option, then commit d05fe9fd3c ("Revert
"Makefile.mk:Use Localiser GCC option"") reverted it because older GCC
versions did not support it.
This change re-enables it for GCC version equal or greater than 14.1.0.
Change-Id: If5d36b073bb5b4cccb0cf2b67b43edb3f97f168c
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84074
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
This environment variable can be used to identify when the build is
running from abuild. This can control things like whether or not the
payloads will pull down a new version from git.
This is important on the builders because the network can't be accessed,
but also it'd be unexpected to change the state of the tree when running
abuild locally.
Change-Id: I03a29aeff655ba7067b505b4e26d5b0f4157c67f
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87366
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Add a linter file to check the formatting of our go files.
For now only intelp2m utiliy is checked.
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I9c75fc0bf20a2625ddae43b0472a6586ae78f213
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87211
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
As per commit cf4722d317 ("src/mb: Update unlicensable files with the
CC-PDDC SPDX ID") effectively empty files should use the Creative
Commons Public Domain Dedication and Certification (CC-PDDC) license
header. Add a function to create an empty file and add the CC-PDDC SPDX
header and a comment to change the license if content is added.
The only empty files that autoport currently generates are ec.asl and
superio.asl on non-laptop systems, where NoEC() is used.
Change-Id: I409a6d90d671258e318c26e34a35c238d6fd28c1
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84329
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Now that we require the FMAP to start at offset 0 in the flash, we can
assume this across the entire codebase and therefore simplify it on
several ends.
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: Ieb1a23f9c0ae8c0e1c91287d7eb6f7f0abbf0c2c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86771
Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
commit a7eb390796 ("mb/*/*/*.fmd: Start flash at 0")
caused a build failure for all mainboards that generate their FMAP
from the IFD (so intel only) instead of providing one themselves.
Jenkins didn't catch that, because apparently all mainboards that have
the IFD in the 3rdparty/blobs repository provide a custom FMAP.
So there was no defconfig that jenkins tested that would come across
this issue.
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: Ia9852e8ef48148264d2d3f73eb667f3eb8b85005
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87288
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
According to MediaTek's proprietary PI_IMG parser, two cookies (one
header and one footer) are expected. Therefore, add a script to perform
validity check of the PI_IMG firmware, so that format errors could be
caught in build time.
Change-Id: I27011492c7fab747aa3ee12d514d20a6a52d0a4d
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87226
Reviewed-by: Yidi Lin <yidilin@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
After CB:86803, ${branch} variable is no longer valid. Use
${branch_name} instead ${branch} for generating the commit message.
TEST=./util/scripts/update_submodules -R 3rdparty/arm-trusted-firmware/
The script generates the new commit successfully.
Change-Id: Ia528379b8721e6d419984bab28de7cf427e42423
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87268
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
To allow adding more scripts to the util/mtkheader folder, rename it to
util/mediatek. Also update description.md and regenerate
Documentation/util.md and util/README.md by util_readme.sh.
Change-Id: Ibc6ef9dddc541d2dd471898af431cadde231edca
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87225
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
As CB:71757 [1] updates Documentation/util.md and util/README.md
manually without modifying util/intelp2m/description.md, we port the
description changes back to that file.
[1] commit da54bd60af ("Documentation: Update information about
intelp2m")
Change-Id: I3d3f87517c445d650e9cea61448b28d005d46737
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87224
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
FMAP should not contain information about the memory map.
Done with the following command:
"find -name \*.fmd -exec sed -i 's/\(FLASH\).* \(.*\) /\1 \2 /' {} \;"
for AMD:
All addresses that amdfwtool expects as command line parameter have the
ADDR_REL_BIOS (flash address) address_mode setting. One exception is
the *_FW_A_POSITION and *_FW_B_POSITION addresses. But amdfwtool checks
if memory or flash addresses are passed and converts accordingly. So
changing the address from memory -> flash doesn't matter for the
resulting binary.
Since commit 41a162b7a8 ("soc/amd/phoenix/Makefile.inc: Pass APOB_NV
address as offset") and therefore since phoenix SOC, APOB_NV is passed
as flash offset. But before that the memory ABL always assumed a MMIO
address (no matter the address_mode) so we need to add a little quirk
for that.
tested: boot glinda based mainboard and also check that memory training
is still cached successfully in APOB_NV.
Change-Id: Iac86ef9be6b14817a65bf3a7ccb624d205ca3f99
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63771
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Add the PLATFORM_FAEGAN element to the 'platform' enum and use it in the
code. The Faegan SoC is similar to the Glinda SoC, but has a different
PSP ID.
Change-Id: I40a3e9981696fc02a44fbf300d1b47060a4a398b
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86940
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ana Carolina Cabral <ana.cpmelo95@gmail.com>
Other types of FWs in the BIOS table are defined by context. So the
BIOS binary should follow that.
TEST=Binary identical test on platforms before mendocino
Tested on Skyrim
Change-Id: I9c2f2983d03c913b28fbd87aa0925a32a4649d62
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85466
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
It is more reasonable. And, in later change, the Level 1 should be
split with Level 2 and combined with EFS.
Change locate_bdt2_bios to locate_bdt_bios. This function is more
flexibile and covers both L1 and L2 BIOS directory table.
Change-Id: I74605013cf53a38686f4e1e5a89a4e6a870f1f4b
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84532
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This is now drawn (indirectly) from main usb_port_config.
Also drop it from autoport.
Change-Id: I8c5e9b2016cf56538de06575181a0a6b738c6a28
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85925
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Instead of guessing the default branch by iterating over a list of
branch names, use the branch that is configured as default by upstream.
Change-Id: I628b5a4e5228870c54719577e32dae169b0ceb2e
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86803
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Newer recovery images change the manifest format yet again, so increase
the lookhead when parsing the bios_image field to ensure we can find it.
TEST=run `./crosfirmware.sh craaskbowl` without erroring out
Change-Id: Idb1862e38a82f3cec8db55993ccf421cf3572c6f
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86777
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
