crossgcc/buildgcc: introduce RISCV_ISA_SPEC for RISC-V ISA specification

Add RISCV_ISA_SPEC variable and replace hardcoded “20191213”.

Change-Id: I35c01a01998066dcafbd262cebd2f0c544983fa2
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87433
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
This commit is contained in:
Elyes Haouas 2025-04-23 19:15:24 +02:00
commit 89e4fff2d3

View file

@ -47,6 +47,9 @@ CLANG_VERSION=18.1.8
CMAKE_VERSION=3.31.3
NASM_VERSION=2.16.03
# Architecture-specific options
RISCV_ISA_SPEC=20191213
# Filename for each package
GMP_ARCHIVE="gmp-${GMP_VERSION}.tar.xz"
MPFR_ARCHIVE="mpfr-${MPFR_VERSION}.tar.xz"
@ -1042,8 +1045,8 @@ case "$TARGETARCH" in
i386-mingw32) ;;
riscv-elf | riscv64-elf)
TARGETARCH=riscv64-elf
TARGET_GCC_OPTIONS="$TARGET_GCC_OPTIONS --with-isa-spec=20191213"
TARGET_BINUTILS_OPTIONS="$TARGET_BINUTILS_OPTIONS --with-isa-spec=20191213";;
TARGET_GCC_OPTIONS="$TARGET_GCC_OPTIONS --with-isa-spec=${RISCV_ISA_SPEC}"
TARGET_BINUTILS_OPTIONS="$TARGET_BINUTILS_OPTIONS --with-isa-spec=${RISCV_ISA_SPEC}";;
powerpc64*-linux*) ;;
i386*) TARGETARCH=i386-elf;;
arm*) TARGETARCH=arm-eabi;;