Set the EDK2 PCD to COREv4 so that ACPI tables that are created by EDK2
always use the coreboot OEM ID instead of the default one ("INTEL").
The name is taken from: include/acpi/acpi.h (OEM_ID)
tested:
build and see that BGRT table contains COREv4 instead of INTEL as OEM
ID.
Change-Id: I5e3a7d0f133e5b790f59ea522a71647f72ffc79c
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87647
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
The existing lanczos_weight() implementation naively follows the purely
mathematical definition for the `x == 0` special case. However, the
point of defining that special case is obviously to prevent division by
zero in the general case formula. Unfortunately we are still doing some
multiplications with `x` before we get to the division step, and our
fpmath library loses precision during multiplication. This can lead to
edge cases where `x` is not zero but `x_times_pi` later ends up being 0,
which causes the division to throw an exception after all. (I guess
we've just been lucky to not see this case in practice for now... it
requires the output pixel coordinate to be extremely close to but not
quite on the next input pixel coordinate, which may be rare in practice
with our scaling algorithms.)
This patch fixes the issue by implementing the special case later and
checking if `x_times_pi` is zero instead. Note that as long as we pass
this check, we can be confident that the division cannot fail even
though fpdiv() also truncates the divisor: this is because `x_times_pi`
was calculated from an fpmul() call with the constant fppi(), which has
34 significant bits. Even if x is the smallest possible non-zero value
after scaling for multiplication, the result `x_times_pi` must still
have 18 significant bits. That means it can be scaled down a further 16
bits for division without becoming zero.
Also add a simple unit test forcing exactly this condition to ensure the
code will not regress.
Change-Id: I2f212ee5df38252e97ec55aba3d2d25320c4b102
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87532
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Jakub "Kuba" Czapiga <czapiga@google.com>
Disks larger than 2TB (technically disks with more than 2^32 blocks, but
for the common block size of 512 that comes out to 2TB) cannot represent
their full amount of blocks in the SCSI READ_CAPACITY(10) command used
by libpayload's USB mass storage driver. The entire driver isn't written
to support block addresses larger than 32 bits anyway.
The SCSI command has been designed in a clever way so that devices are
supposed to return the maximum value (0xffffffff) if the actual value
doesn't fit. However, our code adds one to the value (because it is
actually the address of the last block, but we want to know the number
of blocks). This makes it overflow back to 0 which is not great.
This patch caps the result before incrementing it so that the overflow
cannot occur, allowing us to at least access the first 2TB of super
large USB sticks.
Change-Id: Ic445923b7d588c4f523c4ed95a06291bc1969261
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87506
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
On recent AMD platforms the VRT bit in the StatusD register is
read-writeable and set every 1024msec when RTC power is good.
This leads to a timeout in RtcWaitToUpdate() waiting for the bit
to be set and the gEfiRealTimeClockArchProtocolGuid won't be installed.
The protocol is critical to boot.
Adjust the code to not clear the VRT bit, as RtcWaitToUpdate() will
return an error, as it assumes the VRT bit is read-only and hardwired
to one as on Intel ICHs. While the timeout could be increased it
would also increase boot time by up to a second.
On platforms where the VRT bit is read-only the introduced code
does the same as before.
Change-Id: I8bc432114c83fa5f5fb35a144e3a35c38ee8a3de
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87415
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Add a Kconfig to support passing `LOAD_OPTION_ROMS=TRUE` as a build
parameter in order to enable edk2 support for dGPUs.
Change-Id: I05444425d1cb98b023681639389949bf3f3b8e9c
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87407
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: Alicja Michalska <ahplka19@gmail.com>
Update the default branch used for MrChromebox's edk2 fork from 2024-08
to 2025-02. This updated branch has been rebased on the latest upstream
stable tag (edk2-stable202502), and updates the EFI revocation database
used for SecureBoot. It also adds support for the CFR-based setup menu
and configuration management, and support for running OpROMs on
external dGPUs.
TEST=build/boot google boards link, panther, lulu, reef, ampton, akemi,
banshee, zork, dewatt, frostflow with edk2 payload selected.
Change-Id: I1f900d0e33e88d747547a1f5218445bb0cce4e4b
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87406
Reviewed-by: Alicja Michalska <ahplka19@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Add an allocation of an empty buffer for the Android protected virtual
machine firmware within cbmem. The buffer will be filled by the payload
and the purpose is to just reserve the memory. cbmem is used to make
sure that the region won't overlap with other reserved regions
or device regions.
BUG=b:354045389
BUG=b:359340876
TEST=depthcharge receives the buffer through lib_sysinfo
BRANCH=main
Change-Id: I48efc033ac0f5fbfcf3a52fabf40be016cd4c6f7
Signed-off-by: Bartłomiej Grzesik <bgrzesik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87107
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub "Kuba" Czapiga <czapiga@google.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
libpayload stdint.h only supports typedefs for datatypes of exact
bits. This makes libpayload less flexible to support libraries
that reference different data types.
Add fast data types in types.h.
BUG=b:386913035
Change-Id: Ie9197866ae9b6c27d3f26c11d8409ecb90321c74
Signed-off-by: Masa Nakura <nakura@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86632
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Hsuan-ting Chen <roccochen@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
The x86 (AMD and Intel) spec defines it as Page-Map Level-4 Entry.
It is annoying when searching for the wrong abbreviation in the spec so
fix it everywhere it occurs.
source: Intel 64 spec April 2022 and AMD64 spec April 2024.
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I730235beea69b3720f080bbade083c2eeed26587
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86587
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Benjamin Doron <benjamin.doron00@gmail.com>
Reviewed-by: Andy Ebrahiem <ahmet.ebrahiem@9elements.com>
Only print the warning if Linuxboot payload is actually selected,
because we don't care otherwise.
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I5008d685c52c1d4e0d7eba44c964c51a2a6f99c3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85957
Reviewed-by: Ana Carolina Cabral <ana.cpmelo95@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Alicja Michalska <ahplka19@gmail.com>
selfboot() doesn't really need to be architecture dependent. All
architectures are essentially doing the same thing with a normal
function call, only x86_32 needs an extra attribute. arm64 and x86 also
previously haven't been passing the coreboot table pointer, even though
they should. This patch fixes that.
Change-Id: If14040e38d968b5eea31cd6cd25efb1845a7b081
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86142
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Currently u-root doesn't build for various reasons.
1. The boot cmds have changed. Some have been removed and the default
has changed to the 'boot' cmd for loading an OS.
2. The elvish shell has been removed as default shell. The gosh is now
the default.
3. For some reason the -uroot-source parameter doesn't exist anymore? So
instead we just cd into the u-root directory and build the initramfs
there.
Build tested:
| CONFIG_LINUXBOOT_COMPILE_KERNEL | CONFIG_LINUXBOOT_BUILD_INITRAMFS |
----------------------------------------------------------------------
| n | n |
| n | y |
| y | n |
| y | y |
----------------------------------------------------------------------
Change-Id: If66238cec248deb3594de82f3adbc608516a2fc5
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84119
Reviewed-by: Alicja Michalska <ahplka19@gmail.com>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Currently our coreboot toolchain cannot build the Linux kernel in case
of x86_64. It spits out the following error during build:
```
make -C build/kernel-6_3 \
CROSS_COMPILE=/home/max/coreboot-amd/util/crossgcc/xgcc/bin/x86_64-elf- \
ARCH=x86_64 KBUILD_BUILD_USER=coreboot KBUILD_BUILD_HOST=reproducible \
KBUILD_BUILD_TIMESTAMP=Tue Aug 20 13:36:03 2024 KBUILD_BUILD_VERSION=0 bzImage
arch/x86/lib/clear_page_64.S: Assembler messages:
arch/x86/lib/clear_page_64.S:18: Error: number of operands mismatch for `mov'
arch/x86/lib/clear_page_64.S:27: Error: number of operands mismatch for `mov'
make[4]: *** [scripts/Makefile.build:374: arch/x86/lib/clear_page_64.o] Error 1
make[3]: *** [scripts/Makefile.build:494: arch/x86/lib] Error 2
make[3]: *** Waiting for unfinished jobs....
arch/x86/entry/entry_64.S: Assembler messages:
arch/x86/entry/entry_64.S:437: Error: unbalanced parenthesis in operand 1.
arch/x86/entry/entry_64.S:262: Info: macro invoked from here
arch/x86/entry/entry_64.S:265: Info: macro invoked from here
arch/x86/entry/entry_64.S:439: Error: unbalanced parenthesis in operand 1.
arch/x86/entry/entry_64.S:262: Info: macro invoked from here
arch/x86/entry/entry_64.S:265: Info: macro invoked from here
make[5]: *** [scripts/Makefile.build:374: arch/x86/entry/entry_64.o] Error 1
make[4]: *** [scripts/Makefile.build:494: arch/x86/entry] Error 2
make[4]: *** Waiting for unfinished jobs....
make[3]: *** [scripts/Makefile.build:494: arch/x86] Error 2
make[2]: *** [Makefile:2025: .] Error 2
make[1]: *** [targets/linux.mk:60: build/kernel-6_3/arch/x86/boot/bzImage] Error 2
make: *** [payloads/external/Makefile.mk:401: payloads/external/LinuxBoot/build/Image] Error 2
```
In order to fix it, we will default to the host toolchain in order to
build x86_64 Linux. For that we add another Kconfig that decides,
whether or not a cross toolchain is used to build Linux.
Change-Id: Icaf56d6991d79f629e9ba8c901b441d81921d594
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83990
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
This patch adds a new config to libpayload whose sole purpose it is to
be as different as possible from the defconfig, in order to try to get
the CI to exercise more code paths and thus catch more issues.
Change-Id: Ia6bd7572056b7a02acb686542810e661e015cc69
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81362
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Currently, building edk2 with coreboot will show multiple error
prints:
!!!!!!!! Image Section Alignment(0x40) does not match Required Alignment (0x1000) !!!!!!!!
Adjust the definations so these are aligned to 0x1000.
Change-Id: I881bfd1eec55454e444909b845a342a94ba8904b
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84353
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Benjamin Doron <benjamin.doron00@gmail.com>
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
The mock/arch/cache.h file exists for libpayload unit tests. However,
the default implementations (as empty macros) in it make these functions
difficult to mock in unit tests.
Therefore, we follow what's done for mock/arch/io.h, by only including
function declarations in the header. Each test is expected to implement
mocks for these cache functions when required.
Change-Id: Ie4383bf95435fd7d74d624b19b79b5a117cf6d00
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84608
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Hsuan-ting Chen <roccochen@google.com>
There is already a check for invalid reference, however `git rev-parse
reference` doesn't fail on unknown commit hash unless `^{object}`
peeling operator is used (`^{commit}` can be used as well).
Change-Id: I7ef39aeee2e902ac2fad6ac41b546c47418e1dec
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84292
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Update the default branch used for MrChromebox's edk2 fork from 2023-09
to 2024-08. This updated branch has been rebased on the latest upstream
stable tag (edk2-stable202408), and updates the EFI filesystem drivers
which had been causing some issues with bootable USBs created using
Rufus as it tried to unload the filesystem drivers and load its own.
TEST=build/boot google boards link, panther, lulu, reef, ampton, akemi,
banshee, zork, dewatt, frostflow with edk2 payload selected.
Change-Id: I459b668345ed2a34e198e6a3d3a2da94b2940e69
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84293
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Move config PAYLOAD_FIT_SUPPORT out of the `if !PAYLOAD_NONE'. It's
independent of the choice to add a payload right away.
Change-Id: I4b9cd13bf017d4afc30d1599ecc2faaf87bf0213
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84086
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This makes it easy to switch between x86_32 and x86_64 in payloads.
Change-Id: I3ac5f24d83dc80db924e92b53403c477e6256c44
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84014
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
The value used is not acceptable to BFD linker.
Change-Id: I0f134a96c596d69e10dd441b96184b119e9f1908
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84013
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This allows nvramcui to be build with clang.
Change-Id: I5e56ead81fc92b7ba4fb63a2c098b0e10b01ca53
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84010
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
commonlib/region.h requires SIZE_MAX to be defined.
Change-Id: I588d59c2637b10def046ea02293e5503c9b6bc3d
Signed-off-by: Jakub Czapiga <czapiga@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83907
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Add strlen() and strnlen() to commonlib/bsd by rewriting them from
scratch, and remove the same functions from coreboot and libpayload.
Note that in the existing libpayload implementation, these functions
return 0 for NULL strings. Given that POSIX doesn't require the NULL
check and that other major libc implementations (e.g. glibc [1]) don't
seem to do that, the new functions also don't perform the NULL check.
[1] https://github.com/bminor/glibc/blob/master/sysdeps/i386/strlen.c
Change-Id: I1203ec9affabe493bd14b46662d212b08240cced
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83830
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Official EDK2 repository has VARIABLE_SUPPORT defaulting to EMU in
UefiPayloadPkg, switch it to SMMSTORE if coreboot is built with
SMMSTOREv2.
This removes custom default of EDK2_CUSTOM_BUILD_PARAMS for
EDK2_REPO_MRCHROMEBOX which is unnecessary now.
Change-Id: Ic59f89c0f708f9b144bd35cd18870d0e1c65677d
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83737
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Without this, when doing a clean build with 'make j$(nproc)`, the build
can fail copying the GOP driver file since the target directory does
not exist yet.
TEST=build/boot google/hatch (akemi) w/edk2 payload and GOP driver init
on a clean git checkout.
Change-Id: Ic510d70041dc099e6bc469528b80d1e271976655
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83474
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
This change removes the unnecessary conditional compilation around
CBMEM_ID_CSE_BP_INFO and CBMEM_ID_CSE_INFO handling in
cb_parse_cbmem_entry. These CBMEM IDs are only relevant on platforms
with SOC_INTEL_CSE_LITE_SYNC_BY_PAYLOAD enabled, and platforms without
this config option won't encounter these IDs when calling
cb_parse_cbmem_entry().
BUG=b:305898363
TEST=Builds and boots successfully:
* google/rex0 with SOC_INTEL_CSE_LITE_SKU
* google/rex64 with SOC_INTEL_CSE_LITE_SYNC_BY_PAYLOAD
Change-Id: Icf056f8426015e99509be5f5a67cb66468645cd9
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83436
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
This patch adds support for x86-64 to the rdtsc() function, allowing
it to correctly read the Time Stamp Counter (TSC) on both 32-bit and
64-bit x86 architectures.
BUG=b:242829490, b:351851626
TEST=Builds and boots on google/rex0 and google/rex64 systems and
manually verified correct TSC readings on x86-32 and x86-64 hardware.
Change-Id: I0afac3db2e82a245a37c2e5cf2302bf1dad62c01
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83414
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
This patch refactors the handling of CSE CBMEM IDs to enable platforms
to choose whether to perform CSE sync operations within coreboot or
defer it to the payload. This separation improves code organization,
ensuring `cse_lite.c` focuses on coreboot-specific CSE Lite tasks.
Now, platforms can select:
* `SOC_INTEL_CSE_LITE_SKU` for CSE sync within coreboot
* `SOC_INTEL_CSE_LITE_SYNC_BY_PAYLOAD` for deferred payload sync
This change ensures mutually exclusive options, avoiding unnecessary
SPI flash size increases.
BUG=b:305898363
TEST=Builds and boots successfully:
* google/rex0 with SOC_INTEL_CSE_LITE_SKU
* google/rex64 with SOC_INTEL_CSE_LITE_SYNC_BY_PAYLOAD
Change-Id: I74f70959715f9fd6d4d298faf310592874cc35d4
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83393
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
With commit 238ff1e9c7 ("payloads/ipxe: Prefix iPXE options with "IPXE"
instead "PXE""), the prefix for iPXE related Kconfig identifiers was
unified to "IPXE". So rename the identifier for the TRUST_CMD option as
well, which was introduced later.
Change-Id: I918358b859003503526ba7849494bb23f8c893fd
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83361
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
When starting a nested instance Make communicates information on the
number of jobs and how to synchronize difference instances via MAKEFLAGS
variable. Explicitly overwriting it when invoking
payloads/external/iPXE/Makefile ends up forcing serial build of iPXE.
iPXE builds hundreds of files and its dependency generation is done
separately from compilation making the whole process take couple minutes
on a single CPU (which becomes several seconds if large enough number of
CPUs is available).
iPXE seems to have Make-based build system that has no problems with
parallel build and not utilizing that effectively turns it into a
bottleneck when building a coreboot image in parallel.
It's unclear whether MAKEFLAGS= was even added for any particular
purpose. It doesn't prevent child instances from using variables of
parents, nor it prevents child instance from running in parallel
(because it's still passed as an environment variable that's processed
prior of variable assignments on command-line), but it does prevent
grandchild instance from running in parallel (actual iPXE's Makefile).
MFLAGS contains flags from MAKEFLAGS and isn't used implicitly by Make,
so no need to clear it either because iPXE doesn't use it.
Change-Id: Iac00e2f86d160793d3217e00ddc5012202b3196a
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83081
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Add 64 bit encode/decode functions to libpayload, since it is required
in the patch that moves device_tree to commonlib.
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I5dba9a7f41147a511ba1250786e7c51ce623e70a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83082
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Set a pointer in lib_sysinfo for CSE_BP_INFO and CSE_INFO.
BUG=b:343022317
TEST=Verified CBMEM data in depthcharge on Screebo
Signed-off-by: Eran Mitrani <mitrani@google.com>
Change-Id: I3aa64d1e439a0596e732a3c0608d60913cefd19f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82790
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Removed an extra space character from the `printf` format string in
`dump_exception_state` to ensure proper alignment of register values
when printed during exception handling.
BUG=b:336265399
TEST=Built and booted google/rex64 successfully.
Verified correct alignment in exception state dumps.
Change-Id: I8ff92775e32ee754967b1b0a43cd68971b4aadfc
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83047
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
