SPC741D8-2L2T/BCM is a Xeon SP 4th/5th gen (Eagle Stream) platform with:
- 1 SPR socket, 8 DDR5 DIMMs each
- 4x PCIe 5.0 / CXL 1.1 x16 slots
- 2x MCIO PCIe 5.0 x8 and 1 MCIO on PCH
- 2x M.2 PCH PCIe slots
- 2x 10 Gbit/s NIC and 2x 1 Gbit/s i210 NIC
It has an AST2600 BMC for remote management and most SuperIO functions
such as serial and an additional Nuvoton NCT6796D-E for others.
Working:
- All CPU cores of a 4/5th-gen Xeon SP are available at full speed
- All 8 memory DIMMs (KSM48R40BS8KMM-16HMR) with 32 bit execution
- All 4 PCIe slots
- On-board USB ports
- Video output via the AST2600 (on-board VGA)
- M.2 devices
Untested:
- TPM header
Not working:
- Serial port I/O, related to the AST2600 SuperIO not being located at
the default address of 0x2E (it uses 0x4E instead).
- PC speaker (buzzer), for the same reason.
- M.2 SSDs only use PCIe 3.0 x2, however, they should be capable of
PCIe 3.0 x4 speeds, which can be observed using the vendor firmware.
- Using more than 1 DIMM with 64 bit execution (the FSP
temp_ram_exit function never returns)
TEST=build/boot to Linux 6.12 using mainline edk2
Change-Id: I5b00a6f4ee68f71203940644860bf095615a9412
Signed-off-by: Fabian Meyer <fabian.meyer@student.kit.edu>
Co-authored-by: Yussuf Khalil <yussuf.khalil@kit.edu>
Co-authored-by: Felix Zimmer <felix.zimmer@student.kit.edu>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87747
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
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