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soc/intel/xeon_sp/gnr: Use official microcodes

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Use microcode updates from intel-microcode submodule by default.
Downstream users can still decide to use their own files.

TEST=Build and boot on intel/avenuecity CRB
TEST=Build and boot on intel/beechnutcity CRB

Change-Id: I5a37423426b19dc9ec76984df5ad9c6d2a28f83b
Signed-off-by: Jincheng Li <jincheng.li@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88283
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
This commit is contained in:
Jincheng Li 2025-07-03 14:31:39 +08:00 • committed by Matt DeVillier
commit 3828153ea5
4 changed files with 3 additions and 5 deletions
Download patch file Download diff file Expand all files Collapse all files

2
configs/builder/config.intel.crb.avc
View file

@ -15,7 +15,6 @@ CONFIG_NO_GFX_INIT=y
CONFIG_HAVE_IFD_BIN=y
CONFIG_HAVE_PBP_BIN=y
CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
CONFIG_ADD_FSP_BINARIES=y
CONFIG_PAYLOAD_LINUX=y
@ -27,7 +26,6 @@ CONFIG_CONSOLE_SERIAL_115200=y
#
CONFIG_IFD_BIN_PATH="site-local/avenuecity/descriptor.bin"
CONFIG_PBP_BIN_PATH="site-local/avenuecity/pbp.bin"
CONFIG_CPU_UCODE_BINARIES="site-local/avenuecity/ucode.mcb"
CONFIG_FSP_T_FILE="site-local/avenuecity/Server_T.fd"
CONFIG_FSP_M_FILE="site-local/avenuecity/Server_M.fd"
CONFIG_FSP_S_FILE="site-local/avenuecity/Server_S.fd"

2
configs/builder/config.intel.crb.bnc
View file

@ -15,7 +15,6 @@ CONFIG_NO_GFX_INIT=y
CONFIG_HAVE_IFD_BIN=y
CONFIG_HAVE_PBP_BIN=y
CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
CONFIG_ADD_FSP_BINARIES=y
CONFIG_PAYLOAD_LINUX=y
@ -27,7 +26,6 @@ CONFIG_CONSOLE_SERIAL_115200=y
#
CONFIG_IFD_BIN_PATH="site-local/beechnutcity/descriptor.bin"
CONFIG_PBP_BIN_PATH="site-local/beechnutcity/pbp.bin"
CONFIG_CPU_UCODE_BINARIES="site-local/beechnutcity/ucode.mcb"
CONFIG_FSP_T_FILE="site-local/beechnutcity/Server_T.fd"
CONFIG_FSP_M_FILE="site-local/beechnutcity/Server_M.fd"
CONFIG_FSP_S_FILE="site-local/beechnutcity/Server_S.fd"

1
src/soc/intel/xeon_sp/gnr/Kconfig
View file

@ -2,7 +2,6 @@
config SOC_INTEL_GRANITERAPIDS
bool
select MICROCODE_BLOB_NOT_HOOKED_UP
select FSP_NVS_DATA_POST_SILICON_INIT
select SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION
select XEON_SP_COMMON_BASE

3
src/soc/intel/xeon_sp/gnr/Makefile.mk
View file

@ -26,4 +26,7 @@ CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/gnr
CFLAGS_common += -fshort-wchar
cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-ad-01
cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-af-03
endif ## CONFIG_SOC_INTEL_GRANITERAPIDS