Read-only mirror of https://review.coreboot.org/coreboot.git. Synced every hour. We don't handle Pull Requests.
https://coreboot.org
- C 93.8%
- ASL 2.2%
- Makefile 1.1%
- C++ 0.5%
- Pawn 0.5%
- Other 1.8%
f6be8b0e60
Add code which initializes the AS3722 PMIC based on the initialization sequence U-Boot uses. I wasn't able to find documentation which said what each register in the PMIC does, so the next best solution was to imitate another implementation which presumably sets things up correctly. The code is set up significantly differently than the U-Boot code, first because it uses the i2c driver through it's external interface instead of poking values into the controller's registers directly. The driver uses the packet mode of the controller while the U-Boot code does not. Second, it uses an array of register indices and values, a pattern established with Exynos, instead of having a sequence of calls to the i2c_write function. This change is also a practical test of the i2c driver's write capability. BUG=None TEST=Built and booted into the bootblock on nyan. Used a multimeter to measure the voltage on capacitors connected to the CPU's power rail. When booting U-Boot, the voltage across the capacitors is 1V. When booting coreboot before this change, that rail stayed off and the rail stayed at 0V. After this change it went to 1V. BRANCH=None Change-Id: Iab1f8d3b735b0737ce93ee3c9c7fdb2a1dcbbf8a Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://chromium-review.googlesource.com/172585 Reviewed-by: Ronald Minnich <rminnich@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> |
||
|---|---|---|
| 3rdparty@ba8caa30bd | ||
| configs | ||
| documentation | ||
| payloads | ||
| src | ||
| util | ||
| .gitignore | ||
| COPYING | ||
| Makefile | ||
| Makefile.inc | ||
| PRESUBMIT.cfg | ||
| README | ||
------------------------------------------------------------------------------- coreboot README ------------------------------------------------------------------------------- coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload. With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required. coreboot was formerly known as LinuxBIOS. Payloads -------- After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot. See http://www.coreboot.org/Payloads for a list of supported payloads. Supported Hardware ------------------ coreboot supports a wide range of chipsets, devices, and mainboards. For details please consult: * http://www.coreboot.org/Supported_Motherboards * http://www.coreboot.org/Supported_Chipsets_and_Devices Build Requirements ------------------ * gcc / g++ * make Optional: * doxygen (for generating/viewing documentation) * iasl (for targets with ACPI support) * gdb (for better debugging facilities on some targets) * ncurses (for 'make menuconfig') * flex and bison (for regenerating parsers) Building coreboot ----------------- Please consult http://www.coreboot.org/Build_HOWTO for details. Testing coreboot Without Modifying Your Hardware ------------------------------------------------ If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU. Please see http://www.coreboot.org/QEMU for details. Website and Mailing List ------------------------ Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website: http://www.coreboot.org You can contact us directly on the coreboot mailing list: http://www.coreboot.org/Mailinglist Copyright and License --------------------- The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details. coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details. This makes the resulting coreboot images licensed under the GPL, version 2.