Sean Rhodes f676cffb2d soc/intel/skylake: Change the maximum C state to C8 ... The EDS says that SkyLake "supports C0, C2, C3, C6, C8, and C10 package states". Update the highest state for non-S0ix boards accordingly. Change-Id: I9f0bf7c4d1ccc04b3ceae8b5f1d492dd6faa77e0 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86201 Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2025-01-29 11:45:35 +00:00
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amd	drivers/amd/opensil/acpi.c: Factor common ACPI calls to openSIL driver	2025-01-28 20:18:07 +00:00
cavium	soc/cavium: Fix non matching types	2024-08-30 07:34:47 +00:00
example/min86	soc: Add SPDX license headers to Kconfig files	2024-02-18 02:03:37 +00:00
ibm/power9	3rdparty/open-power-signing-utils: add SecureBoot utility for OpenPOWER	2024-09-06 13:55:50 +00:00
intel	soc/intel/skylake: Change the maximum C state to C8	2025-01-29 11:45:35 +00:00
mediatek	soc/mediatek/mt8196: Add pi_img loader in ramstage	2025-01-27 23:58:02 +00:00
nvidia	arch/arm: Add a few ARM targets as supported by CLANG	2024-08-23 10:40:01 +00:00
qualcomm	qualcomm/common: Remove dead code	2025-01-14 06:36:38 +00:00
rockchip	arch/arm: Add a few ARM targets as supported by CLANG	2024-08-23 10:40:01 +00:00
samsung	samsung/exynos5250: Replace 'unsigned long int' by 'unsigned long'	2025-01-15 08:32:16 +00:00
sifive	tree: Remove unused <assert.h>	2024-11-19 00:40:04 +00:00
ti	soc/ti/am335x: Remove superfluous formats	2024-08-02 14:45:13 +00:00
ucb/riscv	soc: Add SPDX license headers to Kconfig files	2024-02-18 02:03:37 +00:00
xilinx	soc/xilinx/zynq7000: Initial Xilinx Zynq 7000 SoC bringup	2025-01-23 00:41:01 +00:00