soc/intel/skylake: Change the maximum C state to C8

The EDS says that SkyLake "supports C0, C2, C3, C6, C8,
and C10 package states". Update the highest state for non-S0ix
boards accordingly.

Change-Id: I9f0bf7c4d1ccc04b3ceae8b5f1d492dd6faa77e0
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86201
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/intel/skylake/acpi.c

@@ -124,7 +124,7 @@ static int cstate_set_s0ix[] = {
 static int cstate_set_non_s0ix[] = {
 	C_STATE_C1E,
 	C_STATE_C3,
-	C_STATE_C7S_LONG_LAT,
+	C_STATE_C8
 };
 
 const acpi_cstate_t *soc_get_cstate_map(size_t *entries)