coreboot/src/soc
Wenkai Du f10b368e01 broadwell: add RCBA posting read after writing
MEI PCI device has internal logic to flush out the posted writes
before returning completion for non-posted request. When doing a RCBA
write to function disable and then using the PCI CFG RD cycle, need
to do RCBA posting read after writing to it to make sure the write
went through.

As Aaron sugegsted, abstracted function disable path to a common
function.

BUG=chrome-os-partner:33048
TEST=run warm and cold reboot testing

Change-Id: I87aa8ccd604446263fc3621c9a01839a5a75b644
Signed-off-by: Wenkai Du <wenkai.du@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/223715
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2014-10-17 01:14:19 +00:00
..
imgtec New mechanism to define SRAM/memory map with automatic bounds checking 2014-10-03 09:09:36 +00:00
intel broadwell: add RCBA posting read after writing 2014-10-17 01:14:19 +00:00
marvell cosmos: add template for soc and board files 2014-10-09 20:44:46 +00:00
nvidia t132: Enable SMMU translations 2014-10-15 00:10:10 +00:00
qualcomm storm: fix CBFS definitions 2014-10-14 23:59:08 +00:00
rockchip rk3288: cpu frequency up to 1.8GHz 2014-10-15 23:55:59 +00:00
samsung New mechanism to define SRAM/memory map with automatic bounds checking 2014-10-03 09:09:36 +00:00
Kconfig cosmos: add template for soc and board files 2014-10-09 20:44:46 +00:00
Makefile.inc cosmos: add template for soc and board files 2014-10-09 20:44:46 +00:00