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cosmos: add template for soc and board files

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This adds board and soc files as a template for cosmos.

BUG=chrome-os-partner:32772
BRANCH=none
TEST=Built coreboot for cosmos and veyron_pinky.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>

Change-Id: I676bdf460f5dd996dcce1fc422a69882798bc112
Reviewed-on: https://chromium-review.googlesource.com/222050
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
This commit is contained in:
Daisuke Nojiri 2014-10-08 11:38:52 -07:00 • committed by chrome-internal-fetch
commit fd9dbcf102
28 changed files with 779 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

6
configs/config.cosmos Normal file
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@ -0,0 +1,6 @@
CONFIG_VENDOR_GOOGLE=y
CONFIG_BOARD_GOOGLE_COSMOS=y
CONFIG_COREBOOT_ROMSIZE_KB_1024=y
CONFIG_FLASHMAP_OFFSET=0x00100000
CONFIG_VBOOT2_VERIFY_FIRMWARE=y
# CONFIG_CONSOLE_SERIAL is not set

1
configs/fwserial.cosmos Normal file
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@ -0,0 +1 @@
CONFIG_CONSOLE_SERIAL=y

31
src/mainboard/google/Kconfig
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@ -33,6 +33,7 @@ config BOARD_GOOGLE_AURON
Enable this config to select the Google Auron mainboard.
Auron is a Chrome OS mainboard.
Auron is based on the Intel Broadwell platform.
config BOARD_GOOGLE_BELTINO
bool "Beltino"
help
@ -40,6 +41,7 @@ config BOARD_GOOGLE_BELTINO
Enable this config to select the Google Beltino mainboard.
Beltino is a Chrome OS mainboard.
Beltino is based on the Intel Haswell platform.
config BOARD_GOOGLE_BOLT
bool "Bolt"
help
@ -47,6 +49,7 @@ config BOARD_GOOGLE_BOLT
Enable this config to select the Google Bolt mainboard.
Bolt is a Chrome OS mainboard.
Bolt is based on the Intel Haswell platform.
config BOARD_GOOGLE_BUTTERFLY
bool "Butterfly"
help
@ -54,6 +57,15 @@ config BOARD_GOOGLE_BUTTERFLY
Enable this config to select the Google Butterfly mainboard.
Butterfly is a Chrome OS mainboard.
Butterfly is based on the Intel Sandy Bridge platform.
config BOARD_GOOGLE_COSMOS
bool "Cosmos"
help
Google Cosmos mainboard.
Enable this config to select the Google Cosmos mainboard.
Cosmos is a Chrome OS mainboard.
Cosmos is based on the Marvell BG4CD platform.
config BOARD_GOOGLE_DAISY
bool "Daisy"
help
@ -61,6 +73,7 @@ config BOARD_GOOGLE_DAISY
Enable this config to select the Google Daisy mainboard.
Daisy is a Chrome OS mainboard.
Daisy is based on the Samsung Exynos 5250 platform.
config BOARD_GOOGLE_FALCO
bool "Falco"
help
@ -68,6 +81,7 @@ config BOARD_GOOGLE_FALCO
Enable this config to select the Google Falco mainboard.
Falco is a Chrome OS mainboard.
Falco is based on the Intel Haswell platform.
config BOARD_GOOGLE_LINK
bool "Link"
help
@ -75,6 +89,7 @@ config BOARD_GOOGLE_LINK
Enable this config to select the Google Link mainboard.
Link is a Chrome OS mainboard.
Link is based on the Intel Ivy Bridge platform.
config BOARD_GOOGLE_NYAN
bool "Nyan"
help
@ -82,6 +97,7 @@ config BOARD_GOOGLE_NYAN
Enable this config to select the Google Nyan mainboard.
Nyan is a Chrome OS mainboard.
Nyan is based on the Nvidia Tegra 124 platform.
config BOARD_GOOGLE_NYAN_BIG
bool "Nyan Big"
help
@ -89,6 +105,7 @@ config BOARD_GOOGLE_NYAN_BIG
Enable this config to select the Google Nyan Big mainboard.
Nyan Big is a Chrome OS mainboard.
Nyan Big is based on the Nvidia Tegra 124 platform.
config BOARD_GOOGLE_NYAN_BLAZE
bool "Nyan Blaze"
help
@ -96,6 +113,7 @@ config BOARD_GOOGLE_NYAN_BLAZE
Enable this config to select the Google Nyan Blaze mainboard.
Nyan Blaze is a Chrome OS mainboard.
Nyan Blaze is based on the Nvidia Tegra 124 platform.
config BOARD_GOOGLE_PANTHER
bool "Panther"
help
@ -103,6 +121,7 @@ config BOARD_GOOGLE_PANTHER
Enable this config to select the Google Panther mainboard.
Panther is a Chrome OS mainboard.
Panther is based on the Intel Haswell platform.
config BOARD_GOOGLE_PARROT
bool "Parrot"
help
@ -110,6 +129,7 @@ config BOARD_GOOGLE_PARROT
Enable this config to select the Google Parrot mainboard.
Parrot is a Chrome OS mainboard.
Parrot is based on the Intel Ivy Bridge platform.
config BOARD_GOOGLE_PEACH_PIT
bool "Peach Pit"
help
@ -117,6 +137,7 @@ config BOARD_GOOGLE_PEACH_PIT
Enable this config to select the Google Peach Pit mainboard.
Peach Pit is a Chrome OS mainboard.
Peach Pit is based on the Samsung Exynos 5420 platform.
config BOARD_GOOGLE_PEPPY
bool "Peppy"
help
@ -124,6 +145,7 @@ config BOARD_GOOGLE_PEPPY
Enable this config to select the Google Peppy mainboard.
Peppy is a Chrome OS mainboard.
Peppy is based on the Intel Haswell platform.
config BOARD_GOOGLE_RAMBI
bool "Rambi"
help
@ -131,6 +153,7 @@ config BOARD_GOOGLE_RAMBI
Enable this config to select the Google Rambi mainboard.
Rambi is a Chrome OS mainboard.
Rambi is based on the Intel Baytrail platform.
config BOARD_GOOGLE_RUSH
bool "Rush"
help
@ -138,6 +161,7 @@ config BOARD_GOOGLE_RUSH
Enable this config to select the Google Rush mainboard.
Rush is a Chrome OS mainboard.
Rush is based on the Nvidia Tegra 132 platform.
config BOARD_GOOGLE_RUSH_RYU
bool "Rush Ryu"
help
@ -145,6 +169,7 @@ config BOARD_GOOGLE_RUSH_RYU
Enable this config to select the Google Ryu mainboard.
Ryu is a Chrome OS mainboard.
Ryu is based on the Nvidia Tegra 132 platform.
config BOARD_GOOGLE_SAMUS
bool "Samus"
help
@ -152,6 +177,7 @@ config BOARD_GOOGLE_SAMUS
Enable this config to select the Google Samus mainboard.
Samus is a Chrome OS mainboard.
Samus is based on the Intel Broadwell platform.
config BOARD_GOOGLE_SLIPPY
bool "Slippy"
help
@ -159,6 +185,7 @@ config BOARD_GOOGLE_SLIPPY
Enable this config to select the Google Slippy mainboard.
Slippy is a Chrome OS mainboard.
Slippy is based on the Intel Haswell platform.
config BOARD_GOOGLE_STORM
bool "Storm"
help
@ -166,6 +193,7 @@ config BOARD_GOOGLE_STORM
Enable this config to select the Google Storm mainboard.
Storm is a Chrome OS mainboard.
Storm is based on the Qualcomm IPQ806X platform.
config BOARD_GOOGLE_STOUT
bool "Stout"
help
@ -173,12 +201,14 @@ config BOARD_GOOGLE_STOUT
Enable this config to select the Google Stout mainboard.
Stout is a Chrome OS mainboard.
Stout is based on the Intel Ivy Bridge platform.
config BOARD_GOOGLE_URARA
bool "Urara"
help
Google Urara mainboard.
Urara is an embedded device running on MIPS platorm
based on the Pistachio SOC.
config BOARD_GOOGLE_VEYRON_PINKY
bool "Veyron_Pinky"
help
@ -193,6 +223,7 @@ source "src/mainboard/google/auron/Kconfig"
source "src/mainboard/google/beltino/Kconfig"
source "src/mainboard/google/bolt/Kconfig"
source "src/mainboard/google/butterfly/Kconfig"
source "src/mainboard/google/cosmos/Kconfig"
source "src/mainboard/google/daisy/Kconfig"
source "src/mainboard/google/falco/Kconfig"
source "src/mainboard/google/link/Kconfig"

56
src/mainboard/google/cosmos/Kconfig Normal file
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@ -0,0 +1,56 @@
##
## This file is part of the coreboot project.
##
## Copyright 2014 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
if BOARD_GOOGLE_COSMOS
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select BOARD_ID_SUPPORT
select CHROMEOS
select CHROMEOS_VBNV_FLASH
select SOC_MARVELL_BG4CD
select MAINBOARD_HAS_BOOTBLOCK_INIT
select HAVE_HARD_RESET
select RETURN_FROM_VERSTAGE
config MAINBOARD_DIR
string
default google/cosmos
config MAINBOARD_PART_NUMBER
string
default "Cosmos"
config MAINBOARD_VENDOR
string
default "Google"
config VBOOT_RAMSTAGE_INDEX
hex
default 0x3
config BOOT_MEDIA_SPI_BUS
hex
default 2
config DRAM_SIZE_MB
int
default 1024
endif # BOARD_GOOGLE_COSMOS

40
src/mainboard/google/cosmos/Makefile.inc Normal file
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@ -0,0 +1,40 @@
##
## This file is part of the coreboot project.
##
## Copyright 2014 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
bootblock-y += bootblock.c
bootblock-y += boardid.c
bootblock-y += chromeos.c
bootblock-y += reset.c
verstage-y += boardid.c
verstage-y += chromeos.c
verstage-y += reset.c
romstage-y += boardid.c
romstage-y += romstage.c
romstage-y += reset.c
ramstage-y += boardid.c
ramstage-y += chromeos.c
ramstage-y += mainboard.c
ramstage-y += reset.c
bootblock-y += memlayout.ld
verstage-y += memlayout.ld
romstage-y += memlayout.ld
ramstage-y += memlayout.ld

25
src/mainboard/google/cosmos/boardid.c Normal file
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@ -0,0 +1,25 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <boardid.h>
uint8_t board_id(void)
{
return -1;
}

24
src/mainboard/google/cosmos/bootblock.c Normal file
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@ -0,0 +1,24 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <bootblock_common.h>
void bootblock_mainboard_init(void)
{
}

41
src/mainboard/google/cosmos/chromeos.c Normal file
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@ -0,0 +1,41 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <boot/coreboot_tables.h>
#include <vendorcode/google/chromeos/chromeos.h>
void fill_lb_gpios(struct lb_gpios *gpios)
{
}
int get_developer_mode_switch(void)
{
return 0;
}
int get_recovery_mode_switch(void)
{
return 0;
}
int get_write_protect_state(void)
{
return 0;
}

23
src/mainboard/google/cosmos/devicetree.cb Normal file
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@ -0,0 +1,23 @@
##
## This file is part of the coreboot project.
##
## Copyright 2014 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
# TODO fill with Versatile Express board data in QEMU.
chip soc/marvell/bg4cd
device cpu_cluster 0 on end
end

38
src/mainboard/google/cosmos/mainboard.c Normal file
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@ -0,0 +1,38 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <device/device.h>
#include <boot/coreboot_tables.h>
static void mainboard_init(device_t dev)
{
}
static void mainboard_enable(device_t dev)
{
dev->ops->init = &mainboard_init;
}
struct chip_operations mainboard_ops = {
.enable_dev = mainboard_enable,
};
void lb_board(struct lb_header *header)
{
}

1
src/mainboard/google/cosmos/memlayout.ld Normal file
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@ -0,0 +1 @@
#include <soc/marvell/bg4cd/memlayout.ld>

26
src/mainboard/google/cosmos/reset.c Normal file
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@ -0,0 +1,26 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <reset.h>
void hard_reset(void)
{
while (1)
;
}

82
src/mainboard/google/cosmos/romstage.c Normal file
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@ -0,0 +1,82 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <types.h>
#include <armv7.h>
#include <cbfs.h>
#include <console/console.h>
#include <arch/stages.h>
#include <cbmem.h>
#include <delay.h>
#include <timestamp.h>
#include <arch/cache.h>
#include <arch/exception.h>
#include <stdlib.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <soc/marvell/bg4cd/sdram.h>
#include <symbols.h>
#include "timer.h"
void main(void)
{
void *entry;
#if CONFIG_COLLECT_TIMESTAMPS
uint64_t start_romstage_time;
uint64_t before_dram_time;
uint64_t after_dram_time;
uint64_t base_time = timestamp_get();
start_romstage_time = timestamp_get();
#endif
console_init();
#if CONFIG_COLLECT_TIMESTAMPS
before_dram_time = timestamp_get();
#endif
sdram_init();
#if CONFIG_COLLECT_TIMESTAMPS
after_dram_time = timestamp_get();
#endif
mmu_init();
mmu_config_range(0, 4096, DCACHE_OFF);
dcache_mmu_enable();
cbmem_initialize_empty();
#if CONFIG_COLLECT_TIMESTAMPS
timestamp_init(base_time);
timestamp_add(TS_START_ROMSTAGE, start_romstage_time);
timestamp_add(TS_BEFORE_INITRAM, before_dram_time);
timestamp_add(TS_AFTER_INITRAM, after_dram_time);
#endif
entry = vboot_load_ramstage();
if (entry == NULL) {
timestamp_add(TS_START_COPYRAM, timestamp_get());
entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA,
CONFIG_CBFS_PREFIX "/ramstage");
timestamp_add(TS_END_COPYRAM, timestamp_get());
if (entry == (void *)-1)
die("failed to load ramstage\n");
}
#if CONFIG_COLLECT_TIMESTAMPS
timestamp_add_now(TS_END_ROMSTAGE);
#endif
stage_exit(entry);
}

2
src/soc/Kconfig
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@ -1,7 +1,7 @@
source src/soc/imgtec/Kconfig
source src/soc/intel/Kconfig
source src/soc/marvell/Kconfig
source src/soc/nvidia/Kconfig
source src/soc/qualcomm/Kconfig
source src/soc/samsung/Kconfig
source src/soc/rockchip/Kconfig

1
src/soc/Makefile.inc
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@ -3,6 +3,7 @@
################################################################################
subdirs-y += imgtec
subdirs-y += intel
subdirs-y += marvell
subdirs-y += nvidia
subdirs-y += qualcomm
subdirs-y += samsung

20
src/soc/marvell/Kconfig Normal file
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@ -0,0 +1,20 @@
##
## This file is part of the coreboot project.
##
## Copyright 2014 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
source src/soc/marvell/bg4cd/Kconfig

20
src/soc/marvell/Makefile.inc Normal file
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@ -0,0 +1,20 @@
##
## This file is part of the coreboot project.
##
## Copyright 2014 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
subdirs-$(CONFIG_SOC_MARVELL_BG4CD) += bg4cd

52
src/soc/marvell/bg4cd/Kconfig Normal file
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@ -0,0 +1,52 @@
##
## This file is part of the coreboot project.
##
## Copyright 2014 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
config SOC_MARVELL_BG4CD
bool
default n
select CPU_HAS_BOOTBLOCK_INIT
select HAVE_MONOTONIC_TIMER
select GENERIC_UDELAY
select EARLY_CONSOLE
select DYNAMIC_CBMEM
select ARCH_BOOTBLOCK_ARM_V7
select ARCH_VERSTAGE_ARM_V7
select ARCH_ROMSTAGE_ARM_V7
select ARCH_RAMSTAGE_ARM_V7
select BOOTBLOCK_CONSOLE
if SOC_MARVELL_BG4CD
config BOOTBLOCK_CPU_INIT
string
default "soc/marvell/bg4cd/bootblock.c"
config BOOTBLOCK_ROM_OFFSET
hex
default 0x0
config CBFS_HEADER_ROM_OFFSET
hex
default 0x0008000
config CBFS_ROM_OFFSET
hex
default 0x0018000
endif

47
src/soc/marvell/bg4cd/Makefile.inc Normal file
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@ -0,0 +1,47 @@
##
## This file is part of the coreboot project.
##
## Copyright 2014 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
bootblock-y += bootblock.c
bootblock-y += cbmem.c
bootblock-y += monotonic_timer.c
bootblock-y += media.c
bootblock-y += i2c.c
verstage-y += monotonic_timer.c
verstage-y += i2c.c
verstage-y += media.c
romstage-y += cbmem.c
romstage-y += monotonic_timer.c
romstage-y += i2c.c
romstage-y += media.c
romstage-y += sdram.c
ramstage-y += cbmem.c
ramstage-y += monotonic_timer.c
ramstage-y += i2c.c
ramstage-y += media.c
$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
cp $< $@
$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
@printf "Generating: $(subst $(obj)/,,$(@))\n"
@mkdir -p $(dir $@)
@mv $< $@

24
src/soc/marvell/bg4cd/bootblock.c Normal file
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@ -0,0 +1,24 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <bootblock_common.h>
void bootblock_cpu_init(void)
{
}

26
src/soc/marvell/bg4cd/cbmem.c Normal file
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@ -0,0 +1,26 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <cbmem.h>
#include <stddef.h>
void *cbmem_top(void)
{
return NULL;
}

30
src/soc/marvell/bg4cd/i2c.c Normal file
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/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <device/i2c.h>
#include "i2c.h"
int platform_i2c_transfer(unsigned bus, struct i2c_seg *segments, int seg_count)
{
return 0;
}
void i2c_init(unsigned int bus, unsigned int hz)
{
}

26
src/soc/marvell/bg4cd/i2c.h Normal file
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/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef __SOC_MARVELL_BG4CD_I2C_H__
#define __SOC_MARVELL_BG4CD_I2C_H__
void i2c_init(unsigned int bus, unsigned int hz);
#endif

25
src/soc/marvell/bg4cd/media.c Normal file
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/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <cbfs.h>
int init_default_cbfs_media(struct cbfs_media *media)
{
return 0;
}

39
src/soc/marvell/bg4cd/memlayout.ld Normal file
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/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <memlayout.h>
#include <vendorcode/google/chromeos/memlayout.h>
#include <arch/header.ld>
SECTIONS
{
DRAM_START(0x00000000)
RAMSTAGE(0x00200000, 128K)
POSTRAM_CBFS_CACHE(0x01000000, 1M)
SRAM_START(0x80000000)
TTB(0x80000000, 16K)
BOOTBLOCK(0x80004004, 16K - 4)
VBOOT2_WORK(0x80008000, 16K)
OVERLAP_VERSTAGE_ROMSTAGE(0x8000C000, 40K)
PRERAM_CBFS_CACHE(0x80016000, 4K)
STACK(0x80017000, 4K)
SRAM_END(0x80018000)
}

24
src/soc/marvell/bg4cd/monotonic_timer.c Normal file
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/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <timer.h>
void timer_monotonic_get(struct mono_time *mt)
{
}

26
src/soc/marvell/bg4cd/sdram.c Normal file
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/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include "sdram.h"
void sdram_init(void)
{
printk(BIOS_INFO, "Starting SDRAM initialization...\n");
printk(BIOS_INFO, "Finish SDRAM initialization...\n");
}

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src/soc/marvell/bg4cd/sdram.h Normal file
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/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef __SOC_MARVELL_BG4CD_SDRAM_H__
#define __SOC_MARVELL_BG4CD_SDRAM_H__
void sdram_init(void);
#endif