coreboot/src
Aaron Durbin ee4620a90a rambi: configure wake pins as just wake sources
GPIO_ACPI_SCI implies wake and generating an SCI. This
is unnecessary. Therefore, configure the intended wake
pins to only just wake by using GPIO_ACPI_WAKE.

BUG=none
BRANCH=baytrail
TEST=Manual. S3 resumes from keyboard and trackpad. No
     excessive SCI's are generated.

Change-Id: I0b841e64909301e8d4789183ad53a016be7120f1
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/184719
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2014-02-04 00:53:44 +00:00
..
arch arm: Put assembly functions into separate sections 2014-01-29 21:33:41 +00:00
console ARM: Generalize armv7 as arm. 2013-10-02 09:18:44 +00:00
cpu cpu/intel: allow non-packaged scoped turbo setting 2014-01-15 04:52:13 +00:00
device pnp: Allow setting of misc register 0xf4 in device tree 2013-12-20 00:37:38 +00:00
drivers Haswell/falco/peppy/slippy: continue to clean up FUI. 2013-12-19 01:17:37 +00:00
ec chromeec: add function to reboot on unexpected image 2014-01-10 00:11:54 +00:00
include baytrail: snapshot power state in romstage 2014-01-09 20:15:55 +00:00
lib baytrail: snapshot power state in romstage 2014-01-09 20:15:55 +00:00
mainboard rambi: configure wake pins as just wake sources 2014-02-04 00:53:44 +00:00
northbridge haswell: Allow pre-graphics delay 2014-01-25 02:03:21 +00:00
soc baytrail: provide GPIO_ACPI_WAKE configuration 2014-02-04 00:53:41 +00:00
southbridge libpayload: find source of input characters 2014-01-19 04:15:03 +00:00
superio pnp: Allow setting of misc register 0xf4 in device tree 2013-12-20 00:37:38 +00:00
vendorcode VBOOT: Set virtual recovery switch based on EC Software Sync 2014-01-23 19:32:35 +00:00
Kconfig armv8: add support for armv8 cpu 2014-01-07 02:48:47 +00:00