This commit eliminates the power limit constraints initially adopted
from the Fatcat board's codebase. These constraints are tailored for
factory-specific scenarios, which are irrelevant to the Intel Panther
Lake RVP (PTLRVP) board's use case.
Change-Id: I3e4dfe85a2677ad3998fd6c0f9a59fa966587c59
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88132
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
ea3cc3231c