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soc/intel/pantherlake: Correct DRHC and SATC in DMAR table

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This commit addresses an issue within the DMAR (DMA Remapping) table
configuration for Intel Panther Lake (PTL) SoC. Specifically, it
introduces telemetry support to the DRHC structure. In addition, the
unnecessary Dynamic Platform and Thermal Framework (DPTF) entry is
removed from the SATC structure, aligning with the BIOS Requirements.
For detailed specifications, refer to the 812562 PTL Firmware
Architecture Specification (FAS).

BUG=b:423943431
TEST=Boot Fatcat board to ALOS. Disassemble the DMAR table using 2023+
version of iasl and check the DMAR for the telemetry entry in the DRHC
structure. There should not be a DPTF entry in the SATC structure.

Signed-off-by: Cliff Huang <cliff.huang@intel.com>
Change-Id: I289f2520e4449a6aa33f53040b6c8f66faa4f2d7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88136
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Cliff Huang 2025-06-17 16:04:45 -07:00 • committed by Jérémy Compostella
commit cae47dfd44
1 changed files with 6 additions and 5 deletions
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11
src/soc/intel/pantherlake/acpi.c
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@ -253,6 +253,7 @@ static unsigned long soc_fill_dmar(unsigned long current)
bool is_dptf_enabled = is_devfn_enabled(PCI_DEVFN_DPTF);
bool is_npu_enabled = is_devfn_enabled(PCI_DEVFN_NPU);
bool is_iaa_enabled = is_devfn_enabled(PCI_DEVFN_IAA);
bool is_telemetry_enabled = is_devfn_enabled(PCI_DEVFN_TELEMETRY);
printk(BIOS_DEBUG, "%s - gfxvtbar:0x%llx 0x%x\n", __func__, gfxvtbar, MCHBAR32(GFXVTBAR));
if (vtd_engine_enabled & GFXVT_ENABLED) {
@ -263,8 +264,8 @@ static unsigned long soc_fill_dmar(unsigned long current)
acpi_dmar_drhd_fixup(tmp, current);
}
if ((is_ipu_enabled || is_dptf_enabled || is_npu_enabled || is_iaa_enabled) &&
(vtd_engine_enabled & NONGFXVT_ENABLED)) {
if ((is_ipu_enabled || is_dptf_enabled || is_telemetry_enabled || is_npu_enabled ||
is_iaa_enabled) && (vtd_engine_enabled & NONGFXVT_ENABLED)) {
const unsigned long tmp = current;
current += acpi_create_dmar_drhd(current,
0, 0, (uint64_t)VTVC0_BASE_ADDRESS, VTVC0_BASE_SIZE);
@ -272,6 +273,8 @@ static unsigned long soc_fill_dmar(unsigned long current)
current += acpi_create_dmar_ds_pci(current, 0, PCI_DEV_SLOT_IPU, 0);
if (is_dptf_enabled)
current += acpi_create_dmar_ds_pci(current, 0, PCI_DEV_SLOT_DPTF, 0);
if (is_telemetry_enabled)
current += acpi_create_dmar_ds_pci(current, 0, PCI_DEV_SLOT_TELEMETRY, 0);
if (is_npu_enabled)
current += acpi_create_dmar_ds_pci(current, 0, PCI_DEV_SLOT_NPU, 0);
if (is_iaa_enabled)
@ -302,12 +305,10 @@ static unsigned long soc_fill_dmar(unsigned long current)
acpi_dmar_rmrr_fixup(tmp, current);
}
if (is_ipu_enabled || is_dptf_enabled || is_npu_enabled || is_iaa_enabled) {
if (is_ipu_enabled || is_npu_enabled || is_iaa_enabled) {
const unsigned long tmp = current;
current += acpi_create_dmar_satc(current, ATC_REQUIRED, 0);
current += acpi_create_dmar_ds_pci(current, 0, PCI_DEV_SLOT_IGD, 0);
if (is_dptf_enabled)
current += acpi_create_dmar_ds_pci(current, 0, PCI_DEV_SLOT_DPTF, 0);
if (is_ipu_enabled)
current += acpi_create_dmar_ds_pci(current, 0, PCI_DEV_SLOT_IPU, 0);
if (is_npu_enabled)