Ronald G. Minnich 62f8ea8e9b This set of changes gets us much farther, in fact, we get into initram. ... This means that basic resource maps are working, initial hypertransport setup is working, the amd8111 ISA device is working, config space is working for all the parts, we can grow the FLASH part address space to more than 64k, and in general we're having a good time. Here is the output: coreboot-3.0.824 Tue Aug 26 22:18:21 PDT 2008 starting... (console_loglevel=8) Choosing fallback boot. LAR: Attempting to open 'fallback/initram/segment0'. LAR: Start 0xfff80000 len 0x80000 LAR: normal/option_table@0xfff80000, size 1776 LAR: normal/initram/segment0@0xfff80740, size 24404 LAR: normal/stage2/segment0@0xfff866f0, size 1 LAR: normal/stage2/segment1@0xfff86750, size 18542 LAR: normal/stage2/segment2@0xfff8b010, size 559 LAR: normal/payload/segment0@0xfff8b290, size 18142 LAR: bootblock@0xffff7fc0, size 32768 LAR: File not found! LAR: Run file fallback/initram/segment0 failed: No such file. Fallback failed. Try normal boot LAR: Attempting to open 'normal/initram/segment0'. LAR: Start 0xfff80000 len 0x80000 LAR: normal/option_table@0xfff80000, size 1776 LAR: normal/initram/segment0@0xfff80740, size 24404 LAR: CHECK normal/initram/segment0 @ 0xfff80740 start 0xfff80790 len 24404 reallen 24404 compression 0 entry 0x00000004 loadaddress 0x00000000 Entry point is 0xfff80794 Hi there from stage1 stage1 returns run_file returns with 0 Goal for tomorrow is to get initram done. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://coreboot.org/repository/coreboot-v3@826 f3766cd6-281f-0410-b1cd-43a5c92072e9		2008-08-27 05:30:50 +00:00
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amd	This set of changes gets us much farther, in fact, we get into initram.	2008-08-27 05:30:50 +00:00
geodelx	Typo: word duplication.	2008-08-22 11:33:19 +00:00
archelfboot.c	Move include/console/console.h to include/console.h in order to	2007-05-05 20:18:28 +00:00
archtables.c	This set of changes creates irq tables for alix1c and adds the functions	2008-02-09 16:32:59 +00:00
coreboot_table.c	mainboard_vendor and mainboard_name are constant. Follow that convention	2008-08-25 23:54:50 +00:00
i8259.c	Now version 3: LinuxBIOS -> coreboot rename.	2008-01-27 18:54:57 +00:00
isa-dma.c	Ron's arch code., slightly changed. Another one will follow	2007-06-27 21:01:01 +00:00
Kconfig	This set of changes gets us much farther, in fact, we get into initram.	2008-08-27 05:30:50 +00:00
keyboard.c	The current parameter situation of post_code() is rather mixed between	2008-01-07 16:34:34 +00:00
ldscript.ld	For Ron: make BOOTBLOCK_SIZE a variable in the ldscript.	2008-08-24 11:31:19 +00:00
Makefile	Enable compilation with -fwhole-program for initram. The setting can be	2008-08-27 01:10:27 +00:00
mc146818rtc.c	We're getting closer. It has been pointed out that this code is not pretty. I agree. Get	2008-08-03 22:42:01 +00:00
pci_ops_auto.c	Here we start to see the good design of 3. In v2, there were pci ops in	2008-08-13 02:41:29 +00:00
pci_ops_conf1.c	Fix a simply bug in the find device function.	2008-08-25 05:11:59 +00:00
pci_ops_mmconf.c	Constify structs which can be const.	2007-11-26 13:28:52 +00:00
pirq_routing.c	Minor cosmetic and/or license header fixes (trivial).	2008-08-11 21:01:54 +00:00
post_code.c	Now version 3: LinuxBIOS -> coreboot rename.	2008-01-27 18:54:57 +00:00
resourcemap.c	The change to Kconfig is self-acked.	2008-08-13 02:44:46 +00:00
serial.c	Now version 3: LinuxBIOS -> coreboot rename.	2008-01-27 18:54:57 +00:00
speaker.c	Remove superfluous checks for boolean CONFIG_* variables where we tested	2008-02-14 22:34:40 +00:00
stage0_i586.S	Move stage1 global variable management from asm to C. The stage0 asm	2008-08-18 16:54:12 +00:00
stage1.c	This now compiles and has a simple error on build to stage2.	2008-08-23 16:51:00 +00:00
udelay_io.c	Now version 3: LinuxBIOS -> coreboot rename.	2008-01-27 18:54:57 +00:00