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The current parameter situation of post_code() is rather mixed between

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numeric constants and #defines for such constants. Since grepping the
tree shouldn't be necessary to find a POST code and we already have
too many duplicated POST codes, gather almost all of them in a common
header file.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@549 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Carl-Daniel Hailfinger 2008-01-07 16:34:34 +00:00
commit 29d69787ea
9 changed files with 67 additions and 32 deletions
Download patch file Download diff file Expand all files Collapse all files

4
arch/x86/archtables.c
View file

@ -77,7 +77,7 @@ struct lb_memory *arch_write_tables(void)
low_table_start = 0;
low_table_end = 16;
post_code(0x9a);
post_code(POST_STAGE2_ARCH_WRITE_TABLES_ENTER);
/* This table must be betweeen 0xf0000 & 0x100000 */
// rom_table_end = write_pirq_routing_table(rom_table_end);
@ -92,7 +92,7 @@ struct lb_memory *arch_write_tables(void)
// rom_table_end = (rom_table_end+1023) & ~1023;
/* copy the smp block to address 0 */
post_code(0x96);
post_code(POST_STAGE2_ARCH_WRITE_TABLES_MIDDLE);
/* The smp table must be in 0-1K, 639K-640K, or 960K-1M */
// new_low_table_end = write_smp_table(low_table_end);

4
arch/x86/keyboard.c
View file

@ -7,7 +7,7 @@ static int kbd_empty_input_buffer(void)
{
unsigned long timeout;
for(timeout = 1000000; timeout && (inb(0x64) & 0x02); timeout--) {
post_code(0);
post_code(POST_KBD_EMPTY_INPUT_BUFFER);
}
return !!timeout;
}
@ -16,7 +16,7 @@ static int kbd_empty_output_buffer(void)
{
unsigned long timeout;
for(timeout = 1000000; timeout && ((inb(0x64) & 0x01) == 0); timeout--) {
post_code(0);
post_code(POST_KBD_EMPTY_OUTPUT_BUFFER);
}
return !!timeout;
}

2
arch/x86/pci_ops_auto.c
View file

@ -88,5 +88,5 @@ void pci_set_method(struct device * dev)
{
printk(BIOS_INFO, "Finding PCI configuration type.\n");
dev->ops->ops_pci_bus = pci_check_direct();
post_code(0x5f);
post_code(POST_STAGE2_PHASE2_PCI_SET_METHOD);
}

6
arch/x86/stage1.c
View file

@ -41,13 +41,13 @@ void disable_car(void);
static void stop_ap(void)
{
// nothing yet
post_code(0xf0);
post_code(POST_STAGE1_STOP_AP);
}
static void enable_rom(void)
{
// nothing here yet
post_code(0xf2);
post_code(POST_STAGE1_ENABLE_ROM);
}
@ -90,7 +90,7 @@ void __attribute__((stdcall)) stage1_main(u32 bist)
mem->map[0].type = LB_MEM_RAM;
post_code(0x02);
post_code(POST_STAGE1_MAIN);
// before we do anything, we want to stop if we dont run
// on the bootstrap processor.

18
device/device.c
View file

@ -698,16 +698,16 @@ void dev_phase1(void)
{
struct device *dev;
post_code(0x31);
post_code(POST_STAGE2_PHASE1_ENTER);
printk(BIOS_DEBUG, "Phase 1: Very early setup...\n");
for (dev = all_devices; dev; dev = dev->next) {
if (dev->ops && dev->ops->phase1_set_device_operations) {
dev->ops->phase1_set_device_operations(dev);
}
}
post_code(0x3e);
post_code(POST_STAGE2_PHASE1_DONE);
printk(BIOS_DEBUG, "Phase 1: done\n");
post_code(0x3f);
post_code(POST_STAGE2_PHASE1_EXIT);
}
/**
@ -721,7 +721,7 @@ void dev_phase2(void)
{
struct device *dev;
post_code(0x41);
post_code(POST_STAGE2_PHASE2_ENTER);
printk(BIOS_DEBUG, "Phase 2: Early setup...\n");
for (dev = all_devices; dev; dev = dev->next) {
printk(BIOS_SPEW, "%s: dev %s: ", __FUNCTION__, dev->dtsname);
@ -734,9 +734,9 @@ void dev_phase2(void)
printk(BIOS_SPEW, "\n");
}
post_code(0x4e);
post_code(POST_STAGE2_PHASE2_DONE);
printk(BIOS_DEBUG, "Phase 2: Done.\n");
post_code(0x4f);
post_code(POST_STAGE2_PHASE2_EXIT);
}
/**
@ -754,7 +754,7 @@ unsigned int dev_phase3_scan(struct device *busdevice, unsigned int max)
{
unsigned int new_max;
int do_phase3;
post_code(0x42);
post_code(POST_STAGE2_PHASE3_SCAN_ENTER);
if (!busdevice || !busdevice->enabled ||
!busdevice->ops || !busdevice->ops->phase3_scan) {
printk(BIOS_INFO, "%s: %s: busdevice %p enabled %d ops %p\n",
@ -786,7 +786,7 @@ unsigned int dev_phase3_scan(struct device *busdevice, unsigned int max)
}
}
}
post_code(0x4e);
post_code(POST_STAGE2_PHASE3_SCAN_EXIT);
printk(BIOS_INFO, "%s: returning %d\n", __FUNCTION__, max);
return new_max;
}
@ -825,7 +825,7 @@ void dev_root_phase3(void)
if (root->ops && root->ops->phase3_enable_scan) {
root->ops->phase3_enable_scan(root);
}
post_code(0x41);
post_code(POST_STAGE2_PHASE3_MIDDLE);
if (!root->ops) {
printk(BIOS_ERR,
"dev_root_phase3 missing 'ops' initialization\nPhase 3: Failed.\n");

6
device/pci_device.c
View file

@ -1096,7 +1096,7 @@ unsigned int pci_scan_bus(struct bus *bus, unsigned int min_devfn,
__func__, old_devices, bus->dev, bus->dev->dtsname);
bus->children = 0;
post_code(0x24);
post_code(POST_STAGE2_PCISCANBUS_ENTER);
printk(BIOS_SPEW, "PCI: scan devfn 0x%x to 0x%x\n", min_devfn,
max_devfn);
/* Probe all devices/functions on this bus with some optimization for
@ -1129,7 +1129,7 @@ unsigned int pci_scan_bus(struct bus *bus, unsigned int min_devfn,
}
}
printk(BIOS_SPEW, "PCI: Done for loop\n");
post_code(0x25);
post_code(POST_STAGE2_PCISCANBUS_DONEFORLOOP);
/* Die if any leftover static devices are are found.
* There's probably a problem in the Config.lb.
@ -1155,7 +1155,7 @@ unsigned int pci_scan_bus(struct bus *bus, unsigned int min_devfn,
* Return how far we've got finding sub-buses.
*/
printk(BIOS_DEBUG, "PCI: pci_scan_bus returning with max=%03x\n", max);
post_code(0x55);
post_code(POST_STAGE2_PCISCANBUS_EXIT);
return max;
}

37
include/post_code.h
View file

@ -25,6 +25,41 @@
SHARED(post_code, void, u8 value);
#define POST_START_OF_MAIN 0x01
/* This is a collection of existing POST values used by post_code().
* port80_post() and Geode specific codes are not (yet?) listed here.
* FIXME: Conflicts remain.
*/
#define POST_START_OF_MAIN 0x01
#define POST_KBD_EMPTY_INPUT_BUFFER 0x00
#define POST_KBD_EMPTY_OUTPUT_BUFFER 0x00
#define POST_STAGE1_STOP_AP 0xf0
#define POST_STAGE1_ENABLE_ROM 0xf2
#define POST_STAGE1_MAIN 0x02
#define POST_STAGE2_BEGIN 0x20
#define POST_STAGE2_PHASE1_START 0x30
#define POST_STAGE2_PHASE1_ENTER 0x31
#define POST_STAGE2_PHASE1_DONE 0x3e
#define POST_STAGE2_PHASE1_EXIT 0x3f
#define POST_STAGE2_PHASE2_PCI_SET_METHOD 0x5f
#define POST_STAGE2_PHASE2_START 0x40
#define POST_STAGE2_PHASE2_ENTER 0x41
#define POST_STAGE2_PHASE2_DONE 0x4e
#define POST_STAGE2_PHASE2_EXIT 0x4f
#define POST_STAGE2_PHASE3_START 0x30
#define POST_STAGE2_PHASE3_MIDDLE 0x41
#define POST_STAGE2_PHASE3_SCAN_ENTER 0x42
#define POST_STAGE2_PHASE3_SCAN_EXIT 0x4e
#define POST_STAGE2_PHASE4_START 0x40
#define POST_STAGE2_PHASE5_START 0x50
#define POST_STAGE2_PHASE6_START 0x60
#define POST_STAGE2_WRITE_TABLES 0x70
#define POST_STAGE2_ARCH_WRITE_TABLES_ENTER 0x9a
#define POST_STAGE2_ARCH_WRITE_TABLES_MIDDLE 0x96
#define POST_STAGE2_PCISCANBUS_ENTER 0x24
#define POST_STAGE2_PCISCANBUS_DONEFORLOOP 0x25
#define POST_STAGE2_PCISCANBUS_EXIT 0x55
#define POST_ELFBOOT_JUMPING_TO_BOOTCODE 0xfe
#define POST_ELFBOOT_LOADER_STARTED 0xf8
#define POST_ELFBOOT_LOADER_IMAGE_FAILED 0xff
#endif /* POST_CODE_H */

6
lib/elfboot.c
View file

@ -146,7 +146,7 @@ int elfload(struct lb_memory *mem, unsigned char *header, unsigned long header_s
//boot_successful();
printk(BIOS_DEBUG, "Jumping to boot code at %p\n", entry);
post_code(0xfe);
post_code(POST_ELFBOOT_JUMPING_TO_BOOTCODE);
/* Jump to kernel */
/* most of the time, jmp_to_elf_entry is just a call. But this hook gives us
@ -169,7 +169,7 @@ int elfboot_mem(struct lb_memory *mem, void *where, int size)
result = 0;
printk(BIOS_INFO, "ELF loader started.\n");
post_code(0xf8);
post_code(POST_ELFBOOT_LOADER_STARTED);
/* Scan for an elf header */
header_offset = -1;
@ -209,7 +209,7 @@ int elfboot_mem(struct lb_memory *mem, void *where, int size)
printk(BIOS_ERR, "Cannot load ELF image\n");
post_code(0xff);
post_code(POST_ELFBOOT_LOADER_IMAGE_FAILED);
}
return 0;
}

16
lib/stage2.c
View file

@ -46,13 +46,13 @@ int stage2(void)
/* TODO: Add comment. */
void show_all_devs(void);
post_code(0x20);
post_code(POST_STAGE2_BEGIN);
dev_init();
/* Phase 1 was console init and making printk work. Both functions are
* now performed by stage 1 code. Phase 1 is now without purpose.
*/
post_code(0x30);
post_code(POST_STAGE2_PHASE1_START);
dev_phase1();
show_all_devs();
@ -60,34 +60,34 @@ int stage2(void)
* done. This is for ANYTHING that might have to happen before
* device enumeration but that needs a printk.
*/
post_code(0x40);
post_code(POST_STAGE2_PHASE2_START);
dev_phase2();
show_all_devs();
/* Walk physical devices and add any dynamic devices to the
* device tree.
*/
post_code(0x30);
post_code(POST_STAGE2_PHASE3_START);
dev_root_phase3();
show_all_devs();
/* Compute and assign the bus resources. */
post_code(0x40);
post_code(POST_STAGE2_PHASE4_START);
dev_phase4();
show_all_devs();
/* Now actually enable devices on the bus. */
post_code(0x50);
post_code(POST_STAGE2_PHASE5_START);
dev_root_phase5();
show_all_devs();
/* Initialize devices on the bus. */
post_code(0x60);
post_code(POST_STAGE2_PHASE6_START);
dev_phase6();
show_all_devs();
/* TODO: Add comment. */
post_code(0x70);
post_code(POST_STAGE2_WRITE_TABLES);
write_tables();
show_all_devs();