Ana Carolina Cabral a48fd9ed7f soc/amd/cezanne: Add SOC_AMD_RENOIR as a Cezanne variant ... AMD Renoir soc is very similar to Cezanne and has been used without differentiation until now. Create the separation between SOCs using Kconfig option to facilitate the customization of different features. Also update SOC_AMD_RENOIR use on the crater mainboard. Change-Id: I4783c4e3b17032b6d26ef67ddf954df3ce68fdf0 Signed-off-by: Ana Carolina Cabral <ana.cpmelo95@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87215 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2025-11-20 17:39:08 +00:00
..
amd	soc/amd/cezanne: Add SOC_AMD_RENOIR as a Cezanne variant	2025-11-20 17:39:08 +00:00
cavium	soc/cavium: Fix non matching types	2024-08-30 07:34:47 +00:00
example/min86	soc: Add SPDX license headers to Kconfig files	2024-02-18 02:03:37 +00:00
ibm/power9	soc/power9/rom_media.c: find CBFS in PNOR	2025-08-28 20:14:01 +00:00
intel	soc/intel/pantherlake/romstage: Configure VGA mode 12 monochrome buffer	2025-11-19 13:56:41 +00:00
mediatek	soc/mediatek/mt8196: Add dual display pipe path	2025-11-18 07:37:31 +00:00
nvidia	arch/arm: Add a few ARM targets as supported by CLANG	2024-08-23 10:40:01 +00:00
qualcomm	soc/qc/x1p42100: Disable compression for peripheral firmware binaries	2025-11-18 05:00:18 +00:00
rockchip	arch/arm: Add a few ARM targets as supported by CLANG	2024-08-23 10:40:01 +00:00
samsung	samsung/exynos5250: Replace 'unsigned long int' by 'unsigned long'	2025-01-15 08:32:16 +00:00
sifive	tree: Remove unused <assert.h>	2024-11-19 00:40:04 +00:00
ti	soc/ti/am335x: Remove superfluous formats	2024-08-02 14:45:13 +00:00
ucb/riscv	soc/riscv/ucb: Switch to FDT parsing to get memory size	2025-02-26 17:11:09 +00:00
xilinx	soc/xilinx/zynq7000: Initial Xilinx Zynq 7000 SoC bringup	2025-01-23 00:41:01 +00:00