coreboot/src/soc
Michał Żygowski cf280eaa7f amdblocks/root_complex.h: Add new IOHC base addresses
Starting with Turin there are 8 IOHCs per SoC. Add new definitions
for the missing IOHCs. Based on Turin C1 PPR (doc 57238).

Change-Id: I31e93e680e3f0ba03d2595f632d6827b4e3042b8
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90368
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-01-05 20:52:58 +00:00
..
amd amdblocks/root_complex.h: Add new IOHC base addresses 2026-01-05 20:52:58 +00:00
cavium
example/min86
ibm/power9 soc/power9/rom_media.c: find CBFS in PNOR 2025-08-28 20:14:01 +00:00
intel soc/intel/cnvi: Correct S-state level for CNVP 2025-12-26 15:18:40 +00:00
mediatek soc/mediatek/common: Track firmware splash screen rendering completion 2026-01-01 12:48:22 +00:00
nvidia
qualcomm soc/qualcomm/x1p42100: Add API to enable display clocks 2026-01-05 03:10:37 +00:00
rockchip
samsung
sifive
ti
ucb/riscv soc/riscv/ucb: Switch to FDT parsing to get memory size 2025-02-26 17:11:09 +00:00
xilinx