Felix Held cdbfa6e637 soc/amd/common/block/include/espi: rename IO/MMIO base/size registers ... This aligns the register names more with the PPR. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I4e7dc8dfc0fa5e86b9d4425f2496be86e039b686 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61777 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>		2022-02-11 14:18:44 +00:00
..
acpi	soc/amd/common/acpi/gpio_bank_lib: drop unused methods	2021-11-25 11:09:05 +00:00
block	soc/amd/common/block/include/espi: rename IO/MMIO base/size registers	2022-02-11 14:18:44 +00:00
fsp	treewide: Remove "ERROR: "/"WARN: " prefixes from log messages	2022-02-07 23:29:09 +00:00
pi	treewide: Remove "ERROR: "/"WARN: " prefixes from log messages	2022-02-07 23:29:09 +00:00
psp_verstage	soc/amd/common/psp_verstage: Add UART support to PSP console	2022-02-08 16:18:47 +00:00
vboot	treewide: Remove "ERROR: "/"WARN: " prefixes from log messages	2022-02-07 23:29:09 +00:00
Kconfig.common	soc/amd/common/psp_verstage: Introduce boot device driver	2021-09-27 13:40:03 +00:00
Makefile.inc	soc/amd/common: move block/pi out of the block folder	2021-09-24 15:47:59 +00:00