Felix Held cdbfa6e637 soc/amd/common/block/include/espi: rename IO/MMIO base/size registers ... This aligns the register names more with the PPR. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I4e7dc8dfc0fa5e86b9d4425f2496be86e039b686 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61777 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>		2022-02-11 14:18:44 +00:00
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amd	soc/amd/common/block/include/espi: rename IO/MMIO base/size registers	2022-02-11 14:18:44 +00:00
cavium	treewide: Remove "ERROR: "/"WARN: " prefixes from log messages	2022-02-07 23:29:09 +00:00
example	Rename ECAM-specific MMCONF Kconfigs	2021-11-10 17:24:16 +00:00
intel	src/soc/intel/common/block/i2c: Use early BAR in ENV_PAYLOAD_LOADER	2022-02-11 14:09:23 +00:00
mediatek	soc/mediatek/mt8186: Lower SPI NOR speed to 52MHiz	2022-02-11 14:07:18 +00:00
nvidia	treewide: Remove "ERROR: "/"WARN: " prefixes from log messages	2022-02-07 23:29:09 +00:00
qualcomm	treewide: Remove "ERROR: "/"WARN: " prefixes from log messages	2022-02-07 23:29:09 +00:00
rockchip	treewide: Remove "ERROR: "/"WARN: " prefixes from log messages	2022-02-07 23:29:09 +00:00
samsung	soc/samsung/exynos5420: Remove unuseful 'return' in void function	2022-02-01 18:10:53 +00:00
sifive
ti	treewide: Remove "ERROR: "/"WARN: " prefixes from log messages	2022-02-07 23:29:09 +00:00
ucb