coreboot/src/northbridge
Duncan Laurie 0e6ad000e3 haswell: Update GT PM register value
This was changed to 0x80000000 in SA BWG 1.5.0.

BUG=chrome-os-partner:16862
BRANCH=none
TEST=build and boot on wtm2

Change-Id: Ic6773f45057f3eb93b2d93ee543e3db77fccf805
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50852
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2013-05-10 14:05:52 -07:00
..
amd Drop CONFIG_AP_CODE_IN_CAR 2013-05-10 11:55:19 -07:00
intel haswell: Update GT PM register value 2013-05-10 14:05:52 -07:00
rdc GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
via Rename hardwaremain() to main() 2013-05-10 11:55:20 -07:00
Kconfig Add the support for RDC R8610 Northbridge 2012-03-27 18:37:57 +02:00
Makefile.inc Add the support for RDC R8610 Northbridge 2012-03-27 18:37:57 +02:00