coreboot/src
Gabe Black cc5eed84d0 exynos5250: When enabling the I2S pins, turn off pull ups/downs.
These pins will be driven by the internal controller which shouldn't have pull
ups or downs in the pin fighting with them.

BUG=None
TEST=Built and booted on snow.
BRANCH=None

Change-Id: Ia0fc84cd4575e80b2148dce27e14bb7e5042d473
Reviewed-on: https://gerrit.chromium.org/gerrit/55634
Commit-Queue: Stefan Reinauer <reinauer@google.com>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Tested-by: Stefan Reinauer <reinauer@google.com>
2013-05-20 16:09:36 -07:00
..
arch ARMv7: Clean up console code 2013-05-20 13:56:42 -07:00
console console: Make use of CONFIG_USE_OPTION_TABLE 2013-04-01 20:54:48 +02:00
cpu exynos5250: When enabling the I2S pins, turn off pull ups/downs. 2013-05-20 16:09:36 -07:00
device device tree: track init times 2013-05-01 15:36:25 -07:00
drivers BACKPORT: pc80/tpm: allow for cache-as-ram migration 2013-05-16 15:06:25 -07:00
ec Fix Google ChromeEC driver 2013-05-01 10:55:09 -07:00
include BACKPORT: x86: add cache-as-ram migration option 2013-05-16 15:06:24 -07:00
lib BACKPORT: cbmem console: use cache-as-ram API and cleanup 2013-05-16 15:06:26 -07:00
mainboard ARMv7: Clean up console code 2013-05-20 13:56:42 -07:00
northbridge haswell: Update GT PM register value 2013-05-10 14:05:52 -07:00
southbridge lynxpoint: update azalia device ids 2013-05-20 15:28:33 -07:00
superio Drop prototype guarding for romcc 2013-05-10 11:55:20 -07:00
vendorcode BACKPORT: chromeos: use cache-as-ram migration API for vbnv 2013-05-16 15:06:25 -07:00
Kconfig BACKPORT: x86: add thread support 2013-05-15 11:19:50 -07:00