Aaron Durbin cb9ac965ad chromeec: provide proto v3 over i2c support ... Certain boards need to speak proto v3 over i2c. Leverage the transport agnostic API to share the logic with other proto v3 impelementations. BUG=chrome-os-partner:31148 BRANCH=None TEST=Built and ran on ryu. Can talk to the EC successfully. Change-Id: Ib699120fd232392e8caa0889c2bf40f4587a8a35 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211139 Reviewed-by: Stefan Reinauer <reinauer@google.com> Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org>		2014-08-07 22:38:07 +00:00
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arch	arm: add _end symbol to bootblock.ld	2014-08-04 16:34:12 +00:00
console	vboot2: implement select_firmware for pre-romstage verification	2014-06-30 18:45:09 +00:00
cpu	haswell: Update microcode revision	2014-07-29 04:37:18 +00:00
device	i2c: Add software_i2c driver for I2C debugging and emulation	2014-05-19 20:34:31 +00:00
drivers	vboot2: read secdata and nvdata	2014-07-23 02:29:18 +00:00
ec	chromeec: provide proto v3 over i2c support	2014-08-07 22:38:07 +00:00
include	Define gpio polarity values in one place.	2014-08-05 19:49:23 +00:00
lib	Include board ID calculations only when necessary	2014-07-30 23:41:10 +00:00
mainboard	storm: supply vboot GPIO settings in coreboot table	2014-08-07 18:41:57 +00:00
northbridge	coreboot: Rename coreboot_ram stage to ramstage	2014-05-07 23:30:23 +00:00
soc	tegra132: enable pinmux input for PAD_CFG_GPIO_INPUT()	2014-08-06 19:24:11 +00:00
southbridge	coreboot: Rename coreboot_ram stage to ramstage	2014-05-07 23:30:23 +00:00
superio	pnp: Allow setting of misc register 0xf4 in device tree	2013-12-20 00:37:38 +00:00
vendorcode	vboot: fix vboot_load_ramstage()	2014-08-05 02:39:09 +00:00
Kconfig	Enable publishing of board ID where supported	2014-07-30 23:41:23 +00:00