Matt DeVillier 35933e40be Revert "soc/intel/jasperlake: Add CrashLog implementation for Intel JSL" ... This reverts commit 07dd73c921. Jasperlake FSP does not properly support the crashlog feature, and enabling it results in several issues (increased boot time, issues with USB device detection). Change-Id: I5598b40321b3ca15a48ac6eff64a85323d55939d Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86844 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Sowmya Aralguppe <sowmya.aralguppe@intel.com>		2025-03-17 20:21:04 +00:00
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amd	soc/amd/common/block/lpc: Limit ROM2 to 16MiB	2025-03-10 15:21:04 +00:00
cavium	soc/cavium: Fix non matching types	2024-08-30 07:34:47 +00:00
example/min86	soc: Add SPDX license headers to Kconfig files	2024-02-18 02:03:37 +00:00
ibm/power9	3rdparty/open-power-signing-utils: add SecureBoot utility for OpenPOWER	2024-09-06 13:55:50 +00:00
intel	Revert "soc/intel/jasperlake: Add CrashLog implementation for Intel JSL"	2025-03-17 20:21:04 +00:00
mediatek	soc/mediatek/mt8196: Support 512 bytes EDID	2025-03-12 12:45:48 +00:00
nvidia	arch/arm: Add a few ARM targets as supported by CLANG	2024-08-23 10:40:01 +00:00
qualcomm	soc/qualcomm/cmn/qclib: Replace magic number with BIT() macro	2025-03-13 19:22:52 +00:00
rockchip	arch/arm: Add a few ARM targets as supported by CLANG	2024-08-23 10:40:01 +00:00
samsung	samsung/exynos5250: Replace 'unsigned long int' by 'unsigned long'	2025-01-15 08:32:16 +00:00
sifive	tree: Remove unused <assert.h>	2024-11-19 00:40:04 +00:00
ti	soc/ti/am335x: Remove superfluous formats	2024-08-02 14:45:13 +00:00
ucb/riscv	soc/riscv/ucb: Switch to FDT parsing to get memory size	2025-02-26 17:11:09 +00:00
xilinx	soc/xilinx/zynq7000: Initial Xilinx Zynq 7000 SoC bringup	2025-01-23 00:41:01 +00:00