coreboot/src/arch
Maximilian Brune 2b9653cf34 arch/x86/acpi_bert_storage.c: rename check -> proc_err_info
The name check is a bit confusing, since it is not a check structure.
The check structure is below it.

Change-Id: I000e9e5f2ce8210fce76ef81b4242150d02fceed
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90478
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2025-12-30 00:00:26 +00:00
..
arm memlayout: Introduce PRERAM and POSTRAM DMA coherent regions 2025-11-22 17:23:55 +00:00
arm64 arch/arm64: Add an alternative entry point for ramstage code 2025-12-15 10:49:03 +00:00
ppc64 soc/power9/rom_media.c: find CBFS in PNOR 2025-08-28 20:14:01 +00:00
riscv arch/riscv/smp: Fix race condition 2025-12-18 22:25:26 +00:00
x86 arch/x86/acpi_bert_storage.c: rename check -> proc_err_info 2025-12-30 00:00:26 +00:00