coreboot/src
Tom Warren b6ca59e9db nyan: Update 924MHz BCT w/latest qual'd cfg, use 924 as default speed for 2GB
BUG=none
BRANCH=nyan
TEST=built and booted coreboot on my Nyan-rev1, browsed, ran Youtube vids,
WebGL experiments, etc. Everything seemed OK.

Change-Id: I877680c9329ed96a0b602f0690acaa12079786d7
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-on: https://chromium-review.googlesource.com/188550
Reviewed-by: Julius Werner <jwerner@chromium.org>
2014-03-04 07:51:10 +00:00
..
arch ARM: Use LPAE for Virtual Address Translation 2014-02-28 21:04:46 +00:00
console ARM: Generalize armv7 as arm. 2013-10-02 09:18:44 +00:00
cpu x86: Minimize work done with the caches disabled in mtrr functions. 2014-02-27 00:50:17 +00:00
device pnp: Allow setting of misc register 0xf4 in device tree 2013-12-20 00:37:38 +00:00
drivers Haswell/falco/peppy/slippy: continue to clean up FUI. 2013-12-19 01:17:37 +00:00
ec chrome ec: Add support for limiting charger current 2014-02-11 05:24:21 +00:00
include gen: Add "assert" in assert.h. 2014-02-27 05:38:28 +00:00
lib aarch64: Fix 64-bit pointer related casts 2014-02-24 19:19:38 +00:00
mainboard nyan: Update 924MHz BCT w/latest qual'd cfg, use 924 as default speed for 2GB 2014-03-04 07:51:10 +00:00
northbridge haswell: Allow overriding PRE_GRAPHICS_DELAY in config 2014-02-12 03:48:39 +00:00
soc baytrail: Optionally pull up TDO and TMS to avoid power loss in S3. 2014-03-01 02:38:58 +00:00
southbridge chromeos: provide stub functions for !CONFIG_VBOOT_VERIFY_FIRMWARE 2014-02-04 23:05:32 +00:00
superio pnp: Allow setting of misc register 0xf4 in device tree 2013-12-20 00:37:38 +00:00
vendorcode vendorcode: Add ChromeOS VPD parser. 2014-02-27 05:38:31 +00:00
Kconfig armv8: add support for armv8 cpu 2014-01-07 02:48:47 +00:00