coreboot/src/soc
Aaron Durbin b07e0e8ae9 baytrail: fix nvs offsets
The VDAT data was off by 2 bytes when reading it from the
kernel. The reason is that the header did not line up
correctly with actual ACPI code.

BUG=chrome-os-partner:24440
BRANCH=None
TEST=crossystem devsw_cur now returns either 0 or 1 depending
     on state.

Change-Id: Ie78599f29cd5daf7da98db5e37fa276d24339f6a
Signed-off-by: Aaron durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179372
2013-12-10 19:17:17 +00:00
..
intel baytrail: fix nvs offsets 2013-12-10 19:17:17 +00:00
nvidia tegra124: Allow some time for packets to appear in Rx FIFO 2013-11-26 23:35:08 +00:00
samsung exynos: Install the BL1 and set the checksum in the Makefile. 2013-12-10 03:26:39 +00:00
Kconfig ARM: Generalize armv7 as arm. 2013-10-02 09:18:44 +00:00
Makefile.inc armv7: Move Exynos from 'cpu' to 'soc'. 2013-10-01 08:16:46 +00:00