armv7: Move Exynos from 'cpu' to 'soc'.

The Exynos family and most ARM products are SoC, not just CPU.

We used to put ARM code in src/cpu to avoid polluting the code base for what was
essentially an experiment at the time. Now that it's past the experimental phase
and we're going to see more SoCs (including intel/baytrail) in coreboot.

BUG=none
TEST=emerge-daisy chromeos-coreboot-snow;
     emerge-peach_pit chromeos-coreboot-peach_pit

Change-Id: I5ea1f822664244edf5f77087bc8018d7c535f81c
Reviewed-on: https://chromium-review.googlesource.com/170891
Tested-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Ronald Minnich <rminnich@chromium.org>
Commit-Queue: Hung-Te Lin <hungte@chromium.org>

src/cpu/Kconfig

@@ -4,7 +4,6 @@
 if ARCH_ARMV7
 
 source src/cpu/armltd/Kconfig
-source src/cpu/samsung/Kconfig
 
 endif	# ARCH_ARM
 

src/cpu/Makefile.inc

@@ -4,7 +4,6 @@
 subdirs-y += amd
 subdirs-y += armltd
 subdirs-y += intel
-subdirs-y += samsung
 subdirs-y += via
 subdirs-y += x86
 

src/cpu/samsung/Kconfig

@@ -1,2 +0,0 @@
-source src/cpu/samsung/exynos5250/Kconfig
-source src/cpu/samsung/exynos5420/Kconfig

src/mainboard/google/kirby/chromeos.c

@@ -23,8 +23,8 @@
 #include <ec/google/chromeec/ec_commands.h>
 #include <string.h>
 #include <vendorcode/google/chromeos/chromeos.h>
-#include <cpu/samsung/exynos5420/cpu.h>
-#include <cpu/samsung/exynos5420/gpio.h>
+#include <soc/samsung/exynos5420/cpu.h>
+#include <soc/samsung/exynos5420/gpio.h>
 
 enum {
 	ACTIVE_LOW = 0,

src/mainboard/google/kirby/devicetree.cb

@@ -17,7 +17,7 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
 ##
 
-chip cpu/samsung/exynos5420
+chip soc/samsung/exynos5420
 	device cpu_cluster 0 on end
 	register "xres" = "1366"
 	register "yres" = "768"

src/mainboard/google/kirby/mainboard.c

@@ -28,15 +28,15 @@
 #include <boot/coreboot_tables.h>
 #include <arch/cache.h>
 #include <arch/exception.h>
-#include <cpu/samsung/exynos5420/tmu.h>
-#include <cpu/samsung/exynos5420/clk.h>
-#include <cpu/samsung/exynos5420/cpu.h>
-#include <cpu/samsung/exynos5420/gpio.h>
-#include <cpu/samsung/exynos5420/power.h>
-#include <cpu/samsung/exynos5420/i2c.h>
-#include <cpu/samsung/exynos5420/dp.h>
-#include <cpu/samsung/exynos5420/fimd.h>
-#include <cpu/samsung/exynos5420/usb.h>
+#include <soc/samsung/exynos5420/tmu.h>
+#include <soc/samsung/exynos5420/clk.h>
+#include <soc/samsung/exynos5420/cpu.h>
+#include <soc/samsung/exynos5420/gpio.h>
+#include <soc/samsung/exynos5420/power.h>
+#include <soc/samsung/exynos5420/i2c.h>
+#include <soc/samsung/exynos5420/dp.h>
+#include <soc/samsung/exynos5420/fimd.h>
+#include <soc/samsung/exynos5420/usb.h>
 #include <drivers/parade/ps8625/ps8625.h>
 #include <ec/google/chromeec/ec.h>
 #include <stdlib.h>

src/mainboard/google/kirby/memory.c

@@ -22,10 +22,10 @@
 #include <stdlib.h>
 #include <console/console.h>
 
-#include <cpu/samsung/exynos5420/gpio.h>
-#include <cpu/samsung/exynos5420/dmc.h>
-#include <cpu/samsung/exynos5420/setup.h>
-#include <cpu/samsung/exynos5420/clk.h>
+#include <soc/samsung/exynos5420/gpio.h>
+#include <soc/samsung/exynos5420/dmc.h>
+#include <soc/samsung/exynos5420/setup.h>
+#include <soc/samsung/exynos5420/clk.h>
 
 const struct mem_timings mem_timings = {
 		.mem_manuf = MEM_MANUF_SAMSUNG,

src/mainboard/google/kirby/romstage.c

@@ -26,16 +26,16 @@
 #include <timestamp.h>
 
 #include <arch/cache.h>
-#include <cpu/samsung/exynos5420/i2c.h>
-#include <cpu/samsung/exynos5420/clk.h>
-#include <cpu/samsung/exynos5420/cpu.h>
-#include <cpu/samsung/exynos5420/dmc.h>
-#include <cpu/samsung/exynos5420/gpio.h>
-#include <cpu/samsung/exynos5420/setup.h>
-#include <cpu/samsung/exynos5420/periph.h>
-#include <cpu/samsung/exynos5420/power.h>
-#include <cpu/samsung/exynos5420/trustzone.h>
-#include <cpu/samsung/exynos5420/wakeup.h>
+#include <soc/samsung/exynos5420/i2c.h>
+#include <soc/samsung/exynos5420/clk.h>
+#include <soc/samsung/exynos5420/cpu.h>
+#include <soc/samsung/exynos5420/dmc.h>
+#include <soc/samsung/exynos5420/gpio.h>
+#include <soc/samsung/exynos5420/setup.h>
+#include <soc/samsung/exynos5420/periph.h>
+#include <soc/samsung/exynos5420/power.h>
+#include <soc/samsung/exynos5420/trustzone.h>
+#include <soc/samsung/exynos5420/wakeup.h>
 #include <console/console.h>
 #include <arch/stages.h>
 

src/mainboard/google/kirby/wakeup.c

@@ -17,8 +17,8 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include <cpu/samsung/exynos5420/gpio.h>
-#include <cpu/samsung/exynos5420/wakeup.h>
+#include <soc/samsung/exynos5420/gpio.h>
+#include <soc/samsung/exynos5420/wakeup.h>
 
 int wakeup_need_reset(void)
 {

src/mainboard/google/pit/chromeos.c

@@ -23,8 +23,8 @@
 #include <ec/google/chromeec/ec_commands.h>
 #include <string.h>
 #include <vendorcode/google/chromeos/chromeos.h>
-#include <cpu/samsung/exynos5420/cpu.h>
-#include <cpu/samsung/exynos5420/gpio.h>
+#include <soc/samsung/exynos5420/cpu.h>
+#include <soc/samsung/exynos5420/gpio.h>
 
 enum {
 	ACTIVE_LOW = 0,

src/mainboard/google/pit/devicetree.cb

@@ -17,7 +17,7 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
 ##
 
-chip cpu/samsung/exynos5420
+chip soc/samsung/exynos5420
 	device cpu_cluster 0 on end
 	register "xres" = "1366"
 	register "yres" = "768"

src/mainboard/google/pit/mainboard.c

@@ -28,15 +28,15 @@
 #include <boot/coreboot_tables.h>
 #include <arch/cache.h>
 #include <arch/exception.h>
-#include <cpu/samsung/exynos5420/tmu.h>
-#include <cpu/samsung/exynos5420/clk.h>
-#include <cpu/samsung/exynos5420/cpu.h>
-#include <cpu/samsung/exynos5420/gpio.h>
-#include <cpu/samsung/exynos5420/power.h>
-#include <cpu/samsung/exynos5420/i2c.h>
-#include <cpu/samsung/exynos5420/dp.h>
-#include <cpu/samsung/exynos5420/fimd.h>
-#include <cpu/samsung/exynos5420/usb.h>
+#include <soc/samsung/exynos5420/tmu.h>
+#include <soc/samsung/exynos5420/clk.h>
+#include <soc/samsung/exynos5420/cpu.h>
+#include <soc/samsung/exynos5420/gpio.h>
+#include <soc/samsung/exynos5420/power.h>
+#include <soc/samsung/exynos5420/i2c.h>
+#include <soc/samsung/exynos5420/dp.h>
+#include <soc/samsung/exynos5420/fimd.h>
+#include <soc/samsung/exynos5420/usb.h>
 #include <drivers/parade/ps8625/ps8625.h>
 #include <ec/google/chromeec/ec.h>
 #include <stdlib.h>

src/mainboard/google/pit/memory.c

@@ -22,10 +22,10 @@
 #include <stdlib.h>
 #include <console/console.h>
 
-#include <cpu/samsung/exynos5420/gpio.h>
-#include <cpu/samsung/exynos5420/dmc.h>
-#include <cpu/samsung/exynos5420/setup.h>
-#include <cpu/samsung/exynos5420/clk.h>
+#include <soc/samsung/exynos5420/gpio.h>
+#include <soc/samsung/exynos5420/dmc.h>
+#include <soc/samsung/exynos5420/setup.h>
+#include <soc/samsung/exynos5420/clk.h>
 
 const struct mem_timings mem_timings = {
 		.mem_manuf = MEM_MANUF_SAMSUNG,

src/mainboard/google/pit/romstage.c

@@ -26,16 +26,16 @@
 #include <timestamp.h>
 
 #include <arch/cache.h>
-#include <cpu/samsung/exynos5420/i2c.h>
-#include <cpu/samsung/exynos5420/clk.h>
-#include <cpu/samsung/exynos5420/cpu.h>
-#include <cpu/samsung/exynos5420/dmc.h>
-#include <cpu/samsung/exynos5420/gpio.h>
-#include <cpu/samsung/exynos5420/setup.h>
-#include <cpu/samsung/exynos5420/periph.h>
-#include <cpu/samsung/exynos5420/power.h>
-#include <cpu/samsung/exynos5420/trustzone.h>
-#include <cpu/samsung/exynos5420/wakeup.h>
+#include <soc/samsung/exynos5420/i2c.h>
+#include <soc/samsung/exynos5420/clk.h>
+#include <soc/samsung/exynos5420/cpu.h>
+#include <soc/samsung/exynos5420/dmc.h>
+#include <soc/samsung/exynos5420/gpio.h>
+#include <soc/samsung/exynos5420/setup.h>
+#include <soc/samsung/exynos5420/periph.h>
+#include <soc/samsung/exynos5420/power.h>
+#include <soc/samsung/exynos5420/trustzone.h>
+#include <soc/samsung/exynos5420/wakeup.h>
 #include <console/console.h>
 #include <arch/stages.h>
 

src/mainboard/google/pit/wakeup.c

@@ -17,8 +17,8 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include <cpu/samsung/exynos5420/gpio.h>
-#include <cpu/samsung/exynos5420/wakeup.h>
+#include <soc/samsung/exynos5420/gpio.h>
+#include <soc/samsung/exynos5420/wakeup.h>
 
 int wakeup_need_reset(void)
 {

src/mainboard/google/snow/chromeos.c

@@ -23,8 +23,8 @@
 #include <ec/google/chromeec/ec_commands.h>
 #include <string.h>
 #include <vendorcode/google/chromeos/chromeos.h>
-#include <cpu/samsung/exynos5250/cpu.h>
-#include <cpu/samsung/exynos5250/gpio.h>
+#include <soc/samsung/exynos5250/cpu.h>
+#include <soc/samsung/exynos5250/gpio.h>
 
 enum {
 	ACTIVE_LOW = 0,

src/mainboard/google/snow/devicetree.cb

@@ -17,7 +17,7 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
 ##
 
-chip cpu/samsung/exynos5250
+chip soc/samsung/exynos5250
 	device cpu_cluster 0 on end
 	register "xres" = "1366"
 	register "yres" = "768"

src/mainboard/google/snow/mainboard.c

@@ -28,14 +28,14 @@
 #include <boot/coreboot_tables.h>
 #include <arch/cache.h>
 #include <arch/exception.h>
-#include <cpu/samsung/exynos5250/tmu.h>
-#include <cpu/samsung/exynos5250/clk.h>
-#include <cpu/samsung/exynos5250/gpio.h>
-#include <cpu/samsung/exynos5250/power.h>
-#include <cpu/samsung/exynos5250/i2c.h>
-#include <cpu/samsung/exynos5250/dp-core.h>
-#include <cpu/samsung/exynos5250/dp.h>
-#include <cpu/samsung/exynos5250/usb.h>
+#include <soc/samsung/exynos5250/tmu.h>
+#include <soc/samsung/exynos5250/clk.h>
+#include <soc/samsung/exynos5250/gpio.h>
+#include <soc/samsung/exynos5250/power.h>
+#include <soc/samsung/exynos5250/i2c.h>
+#include <soc/samsung/exynos5250/dp-core.h>
+#include <soc/samsung/exynos5250/dp.h>
+#include <soc/samsung/exynos5250/usb.h>
 
 #include "exynos5250.h"
 

src/mainboard/google/snow/memory.c

@@ -22,10 +22,10 @@
 #include <stdlib.h>
 #include <console/console.h>
 
-#include <cpu/samsung/exynos5250/gpio.h>
-#include <cpu/samsung/exynos5250/setup.h>
-#include <cpu/samsung/exynos5250/dmc.h>
-#include <cpu/samsung/exynos5250/clk.h>
+#include <soc/samsung/exynos5250/gpio.h>
+#include <soc/samsung/exynos5250/setup.h>
+#include <soc/samsung/exynos5250/dmc.h>
+#include <soc/samsung/exynos5250/clk.h>
 
 const struct mem_timings mem_timings[] = {
 	{

src/mainboard/google/snow/romstage.c

@@ -25,16 +25,16 @@
 #include <timestamp.h>
 
 #include <arch/cache.h>
-#include <cpu/samsung/exynos5250/i2c.h>
-#include <cpu/samsung/exynos5250/clk.h>
-#include <cpu/samsung/exynos5250/cpu.h>
-#include <cpu/samsung/exynos5250/dmc.h>
-#include <cpu/samsung/exynos5250/gpio.h>
-#include <cpu/samsung/exynos5250/setup.h>
-#include <cpu/samsung/exynos5250/periph.h>
-#include <cpu/samsung/exynos5250/power.h>
-#include <cpu/samsung/exynos5250/trustzone.h>
-#include <cpu/samsung/exynos5250/wakeup.h>
+#include <soc/samsung/exynos5250/i2c.h>
+#include <soc/samsung/exynos5250/clk.h>
+#include <soc/samsung/exynos5250/cpu.h>
+#include <soc/samsung/exynos5250/dmc.h>
+#include <soc/samsung/exynos5250/gpio.h>
+#include <soc/samsung/exynos5250/setup.h>
+#include <soc/samsung/exynos5250/periph.h>
+#include <soc/samsung/exynos5250/power.h>
+#include <soc/samsung/exynos5250/trustzone.h>
+#include <soc/samsung/exynos5250/wakeup.h>
 #include <console/console.h>
 #include <arch/stages.h>
 

src/mainboard/google/snow/wakeup.c

@@ -17,8 +17,8 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include <cpu/samsung/exynos5250/gpio.h>
-#include <cpu/samsung/exynos5250/wakeup.h>
+#include <soc/samsung/exynos5250/gpio.h>
+#include <soc/samsung/exynos5250/wakeup.h>
 
 int wakeup_need_reset(void)
 {

src/soc/Kconfig

@@ -1,3 +1,7 @@
+if ARCH_ARMV7
+source src/soc/samsung/Kconfig
+endif
+
 if ARCH_X86
 source src/soc/intel/Kconfig
 endif

src/soc/Makefile.inc

@@ -3,3 +3,4 @@
 ################################################################################
 subdirs-y += intel
 subdirs-y += nvidia
+subdirs-y += samsung

src/soc/samsung/Kconfig

@@ -0,0 +1,2 @@
+source src/soc/samsung/exynos5250/Kconfig
+source src/soc/samsung/exynos5420/Kconfig

src/soc/samsung/exynos5250/Makefile.inc

@@ -57,5 +57,6 @@ ramstage-y += cbmem.c
 $(obj)/coreboot.rom: exynos5250_add_bl1
 exynos5250_add_bl1: $(obj)/coreboot.pre
 	printf "    DD         Adding Samsung Exynos5250 BL1\n"
+	# TODO(hungte) Change this 'cpu' to soc when build scripts are changed.
 	dd if=3rdparty/cpu/samsung/exynos5250/bl1.bin \
 		of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1

src/soc/samsung/exynos5250/chip.h

@@ -22,7 +22,7 @@
 
 #include "gpio.h"
 
-struct cpu_samsung_exynos5250_config {
+struct soc_samsung_exynos5250_config {
 	/* special magic numbers! */
 	int clkval_f;
 	int upper_margin;

src/soc/samsung/exynos5250/cpu.c

@@ -63,7 +63,7 @@ static void exynos_displayport_init(device_t dev, u32 lcdbase,
 		unsigned long fb_size)
 {
 	int ret;
-	struct cpu_samsung_exynos5250_config *conf = dev->chip_info;
+	struct soc_samsung_exynos5250_config *conf = dev->chip_info;
 	/* put these on the stack. If, at some point, we want to move
 	 * this code to a pre-ram stage, it will be much easier.
 	 */

src/soc/samsung/exynos5420/Makefile.inc

@@ -53,8 +53,8 @@ ramstage-y += cbmem.c
 rmodules-y += monotonic_timer.c
 rmodules-y += mct.c
 
-VBOOT_STUB_DEPS += $(obj)/cpu/samsung/exynos5420/monotonic_timer.rmodules.o
-VBOOT_STUB_DEPS += $(obj)/cpu/samsung/exynos5420/mct.rmodules.o
+VBOOT_STUB_DEPS += $(obj)/soc/samsung/exynos5420/monotonic_timer.rmodules.o
+VBOOT_STUB_DEPS += $(obj)/soc/samsung/exynos5420/mct.rmodules.o
 
 # Run an intermediate step when producing coreboot.rom
 # that adds additional components to the final firmware
@@ -63,5 +63,6 @@ VBOOT_STUB_DEPS += $(obj)/cpu/samsung/exynos5420/mct.rmodules.o
 $(obj)/coreboot.rom: exynos5420_add_bl1
 exynos5420_add_bl1: $(obj)/coreboot.pre
 	printf "    DD         Adding Samsung Exynos5420 BL1\n"
+	# TODO(hungte) Change this 'cpu' to soc when build scripts are changed.
 	dd if=3rdparty/cpu/samsung/exynos5420/bl1.bin \
 		of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1

src/soc/samsung/exynos5420/chip.h

@@ -22,7 +22,7 @@
 
 #include "gpio.h"
 
-struct cpu_samsung_exynos5420_config {
+struct soc_samsung_exynos5420_config {
 	/* special magic numbers! */
 	int clkval_f;
 	int upper_margin;

src/soc/samsung/exynos5420/cpu.c

@@ -76,7 +76,7 @@ static void set_cpu_id(void)
 static void exynos_displayport_init(device_t dev, u32 lcdbase,
 		unsigned long fb_size)
 {
-	struct cpu_samsung_exynos5420_config *conf = dev->chip_info;
+	struct soc_samsung_exynos5420_config *conf = dev->chip_info;
 	/* put these on the stack. If, at some point, we want to move
 	 * this code to a pre-ram stage, it will be much easier.
 	 */