coreboot/src/soc
Aaron Durbin a91dc94240 baytrail: add lpe codec clock configuration
Add device tree option to determine if the LPE
audio codec has a platform clock signal connected
to it from the SoC. If a frequency is selected the
platform clock number is used to enable the
clock.

BUG=chrome-os-partner:23791
BRANCH=None
TEST=Built and booted rambi with 25MHz option. Probed pin
     to audio codec. Noted 25MHz clock.

Change-Id: I67d0d034f30ae1c7ee8269c0aea43e8c92ff868c
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/178780
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
2013-12-05 01:51:19 +00:00
..
intel baytrail: add lpe codec clock configuration 2013-12-05 01:51:19 +00:00
nvidia tegra124: Allow some time for packets to appear in Rx FIFO 2013-11-26 23:35:08 +00:00
samsung arm: Remove CAR_MIGRATE Kconfig and associated cruft 2013-11-20 06:50:58 +00:00
Kconfig ARM: Generalize armv7 as arm. 2013-10-02 09:18:44 +00:00
Makefile.inc armv7: Move Exynos from 'cpu' to 'soc'. 2013-10-01 08:16:46 +00:00