coreboot/src
Hung-Te Lin a534e5b7c6 tegra124: Allow setting PLLM (clock for SDRAM).
The new clock_sdram(...) initialized PLLM by given configuration (which needs to
be explicitly determined, usually from BCT or SDRAM parameters).

BUG=none
TEST=emerge-nyan chromeos-coreoot-nyan
     # With other patches, the new function starts PLLM in correct clock.

Change-Id: I606d0506c734d312db9e1b72a910700ca766f2d3
Reviewed-on: https://chromium-review.googlesource.com/183621
Tested-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Commit-Queue: Hung-Te Lin <hungte@chromium.org>
2014-01-28 02:43:49 +00:00
..
arch arm: Thumb ALL the things! 2014-01-14 03:29:48 +00:00
console ARM: Generalize armv7 as arm. 2013-10-02 09:18:44 +00:00
cpu cpu/intel: allow non-packaged scoped turbo setting 2014-01-15 04:52:13 +00:00
device pnp: Allow setting of misc register 0xf4 in device tree 2013-12-20 00:37:38 +00:00
drivers Haswell/falco/peppy/slippy: continue to clean up FUI. 2013-12-19 01:17:37 +00:00
ec chromeec: add function to reboot on unexpected image 2014-01-10 00:11:54 +00:00
include baytrail: snapshot power state in romstage 2014-01-09 20:15:55 +00:00
lib baytrail: snapshot power state in romstage 2014-01-09 20:15:55 +00:00
mainboard emulation/foundation-armv8: add support for armv8 mainboard 2014-01-25 05:54:34 +00:00
northbridge haswell: Allow pre-graphics delay 2014-01-25 02:03:21 +00:00
soc tegra124: Allow setting PLLM (clock for SDRAM). 2014-01-28 02:43:49 +00:00
southbridge libpayload: find source of input characters 2014-01-19 04:15:03 +00:00
superio pnp: Allow setting of misc register 0xf4 in device tree 2013-12-20 00:37:38 +00:00
vendorcode VBOOT: Set virtual recovery switch based on EC Software Sync 2014-01-23 19:32:35 +00:00
Kconfig armv8: add support for armv8 cpu 2014-01-07 02:48:47 +00:00