Shaunak Saha a3b1bb23fb UPSTREAM: intel/apollolake: Enable turbo ... This patch adds punit initialization code after FspMemoryInit so that turbo can be initialized after that. BUG=chrome-os-partner:58158 BRANCH=None TEST=None Signed-off-by: Shaunak Saha <shaunak.saha@intel.com> Reviewed-on: https://review.coreboot.org/17203 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I4939da47da82b9a728cf1b5cf6d5ec54b4f5b31d Reviewed-on: https://chromium-review.googlesource.com/411489 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2016-11-14 19:59:29 -08:00
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broadcom/cygnus	UPSTREAM: soc/broadcom/cygnus/ddr_init.c: Correct typo in POWER ON and POWER OK.	2016-09-04 23:28:27 -07:00
dmp/vortex86ex	UPSTREAM: src/soc: Capitalize CPU, ACPI, RAM and ROM	2016-08-04 23:37:59 -07:00
imgtec/pistachio	drivers/uart: Use uart_platform_refclk for all UART models	2016-05-09 18:45:44 +02:00
intel	UPSTREAM: intel/apollolake: Enable turbo	2016-11-14 19:59:29 -08:00
lowrisc/lowrisc	UPSTREAM: riscv: add the lowrisc System On Chip support	2016-10-27 12:41:53 -07:00
marvell	UPSTREAM: marvell/mvmap2315: Compose BOOTBLOCK region	2016-10-24 23:30:55 -07:00
mediatek/mt8173	UPSTREAM: src/soc: Add required space before opening parenthesis '('	2016-09-04 19:36:49 -07:00
nvidia	UPSTREAM: Makefiles: update cbfs types from bare numbers to values	2016-09-22 08:55:23 -07:00
qualcomm	soc/qualcomm/ipq40xx: Fix GPIO pull up config.	2016-09-24 02:47:18 -07:00
rdc/r8610	rdc/r8610: Move to src/soc	2016-05-05 20:08:58 +02:00
rockchip	rockchip/rk3399: Change 933 DPLL to low jitter rate	2016-11-02 17:39:58 -07:00
samsung	UPSTREAM: src/soc: Capitalize CPU, ACPI, RAM and ROM	2016-08-04 23:37:59 -07:00
ucb/riscv	UPSTREAM: soc/ucb/riscv: select BOOTBLOCK_CONSOLE	2016-08-15 18:36:13 -07:00