coreboot/src/arch/armv7
Ronald G. Minnich f011097e9f Set armv7 up for cpu_info to work as on x86 (so threads can work)
On x86, cpu_info lives at the top of stack. Make the arm do that as
well, as the threading model needs that and so will multicore support.

As part of this change, make the stack size a power of 2.
Also make it much smaller -- 2048 bytes is PLENTY for ram stage.

Note that the small stack size is counterintuitive for rom stage.  How
can this work in rom stage, which needs a HUGE stack for lzma? The
main use of STACK_SIZE has always been in ram stage; since 2002 or so
it was to size per-core stacks (see, e.g.,

src/arch/x86/lib/c_start.S:.space CONFIG_MAX_CPUS*CONFIG_STACK_SIZE

and, more recently, thread stacks. So, we define the STACK_TOP for rom
and ram stage, but the STACK_SIZE has no real effect on the ROM stage
(no hardware red zones on the stack) and hence we're ok with actually
defining the "wrong" stack size. In fact, the coreboot_ram ldscript
for armv7 sizes the stack by subtracting CONFIG_STACK_BOTTOM from
CONFIG_STACK_TOP, so we replicate that arithmetic in bootblock.inc

Observed stack usage in ramstage:
BS: BS_PAYLOAD_LOAD times (us): entry 1 run 153887 exit 1
Jumping to boot code at 23104044
CPU0: stack: 02072800 - 02073000, lowest used address 020728d4, stack used: 1836 bytes
entry    = 23104044

Which means we do need 2K, not 1K.

BUG=None
TEST=Build and boot and verify that cpu_info returns a correct value
BRANCH=None

Change-Id: I1a21db87081597efe463095bfd33c89eba1d569f
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/66135
Reviewed-by: Ronald G. Minnich <rminnich@chromium.org>
Tested-by: Ronald G. Minnich <rminnich@chromium.org>
Commit-Queue: Ronald G. Minnich <rminnich@chromium.org>
2013-08-20 16:48:12 -07:00
..
include Set armv7 up for cpu_info to work as on x86 (so threads can work) 2013-08-20 16:48:12 -07:00
boot.c Drop ELF remains from boot code 2013-05-28 13:50:06 -07:00
bootblock.inc Set armv7 up for cpu_info to work as on x86 (so threads can work) 2013-08-20 16:48:12 -07:00
bootblock.lds armv7: Reserve space BL1 and checksum header by specifying bootblock offset. 2013-06-12 17:26:30 -07:00
bootblock_simple.c exynos5250: Implement support to boot with USB A-A firmware upload 2013-08-09 11:18:48 -07:00
cache.c ARM: Fix cache cleaning operation. 2013-08-20 16:47:06 -07:00
coreboot_ram.ld BACKPORT: boot state: schedule static callbacks 2013-05-01 14:30:00 -07:00
cpu.c Set armv7 up for cpu_info to work as on x86 (so threads can work) 2013-08-20 16:48:12 -07:00
div0.c ARMv7: flatten arch/armv7 source tree 2013-05-28 13:50:05 -07:00
eabi_compat.c ARMv7: flatten arch/armv7 source tree 2013-05-28 13:50:05 -07:00
early_console.c Don't try to use CBMEM console in bootblock 2013-06-20 15:51:33 -07:00
exception.c ARM: Don't leave alignment checking on after the exception test. 2013-06-20 02:14:26 -07:00
exception_asm.S ARMV7 and Google/Snow: Add exception support code to the ramstage 2013-03-08 22:03:37 +01:00
id.inc ARMv7: flatten arch/armv7 source tree 2013-05-28 13:50:05 -07:00
interrupts.c ARMv7: flatten arch/armv7 source tree 2013-05-28 13:50:05 -07:00
Kconfig ARM: Some Kconfig variables were missed when moving the HAVE_ARCH_*s. 2013-07-11 04:26:09 -07:00
Makefile.inc Set armv7 up for cpu_info to work as on x86 (so threads can work) 2013-08-20 16:48:12 -07:00
memcpy.S ARM: Tell the linker memset and memcpy are functions. 2013-06-14 18:16:58 -07:00
memmove.S arm: Add and enable an arch specific version of memmove. 2013-07-08 11:30:27 -07:00
memset.S ARM: Tell the linker memset and memcpy are functions. 2013-06-14 18:16:58 -07:00
mmu.c ARMv7: flatten arch/armv7 source tree 2013-05-28 13:50:05 -07:00
romstage.ld ARM: Remove (NOLOAD) from the .car section. 2013-08-06 14:57:41 -07:00
stages.c armv7: clean but do not invalidate caches between stages 2013-08-16 19:02:52 -07:00
tables.c Exynos 5250: Enable dynamic CBMEM 2013-07-30 15:24:33 -07:00
timestamp.c Timestamp implementation for ARMv7 2013-08-02 12:16:42 -07:00